DSPIModule is a SPI communications driver. It is an object based driver, which allows for low overhead multiplexing between peripherals with different bus configurations. More...

#include <dspi.h>

Public Member Functions
	DSPIModule (uint8_t SPIModule)
	The minimum DSPIModule Constructor. Requires that configuration settings be applied after construction before use.

	DSPIModule (uint8_t SPIModule, uint32_t baudRateInBps, uint8_t transferSizeInBits=8, uint8_t peripheralChipSelects=0x00, uint8_t chipSelectPolarity=0x0F, uint8_t clockPolarity=0, uint8_t clockPhase=1, BOOL doutHiz=TRUE, uint8_t csToClockDelay=0, uint8_t delayAfterTransfer=0)
	DSPIModule Full DSPIModule Constructor. Will initialize all hardware settings.

uint8_t	Init (uint32_t baudRateInBps=2000000, uint8_t transferSizeInBits=8, uint8_t peripheralChipSelects=0x00, uint8_t chipSelectPolarity=0x0F, uint8_t clockPolarity=0, uint8_t clockPhase=1, BOOL doutHiz=TRUE, uint8_t csToClockDelay=0, uint8_t delayAfterTransfer=0)
	DSPIModule Full DSPIModule Constructor. Will initialize all hardware settings.

uint8_t	Start (uint8_t transmitBufferPtr, volatile uint8_t receiveBufferPtr, uint32_t byteCount, int csReturnToInactive=DEASSERT_AFTER_LAST)
	Start begins a SPI transaction using the provided buffers.

uint8_t	Tx (uint8_t *transmitBufferPtr, uint32_t byteCount, int csReturnToInactive=DEASSERT_AFTER_LAST)
	Tx begins a transmit only SPI transaction using the provided buffer. Silently discards the received data.

uint8_t	Rx (uint8_t *receiveBufferPtr, uint32_t byteCount, int csReturnToInactive=DEASSERT_AFTER_LAST)
	Rx begins a receive only SPI transaction using the provided buffer. Holds output line low during transfers.

bool	EnableDMA (bool enableDMA=true)
	EnableDMA configures whether DMA is allowed for qualifying transactions.

bool	DisableDMA ()
	DisableDMA disables DMA for all transactions.

bool	RegisterSem (OS_SEM *finishedSem)
	Registers a semaphore to be posted to upon completion of transactions.

bool	ClrSem ()
	Clears the semaphore registration.

OS_SEM *	GetSem ()
	Gets a pointer to the registered Semaphore.

bool	Done ()
	Returns whether the previously started transaction is complete.

uint32_t	GetActualBaudrate ()
	Returns the actual bus speed to be used.

bool	SetCS (uint8_t CS)
	Modifies the chip select configuration for the driver context such that only the requested chip select is active during transfers.

Static Public Member Functions
static BOOL	Done (uint8_t SPIModule)
	Returns whether the previously started transaction for a given hardware module is complete.

Friends
uint8_t	DSPIInit (uint8_t SPIModule=DEFAULT_DSPI_MODULE, uint32_t Baudrate=2000000, uint8_t QueueBitSize=8, uint8_t CS=0x00, uint8_t CSPol=0x0F, uint8_t ClkPolarity=0, uint8_t ClkPhase=1, BOOL DoutHiz=TRUE, uint8_t QCD=0, uint8_t DTL=0)
	Initialize a DSPI module.

Detailed Description

DSPIModule is a SPI communications driver. It is an object based driver, which allows for low overhead multiplexing between peripherals with different bus configurations.

Constructor & Destructor Documentation

◆ DSPIModule() [1/2]

DSPIModule::DSPIModule ( uint8_t SPIModule )

The minimum DSPIModule Constructor. Requires that configuration settings be applied after construction before use.

Parameters

SPIModule The DSPI module to use, from 1 to 3. Default is 1.

See also: DSPIModule::DSPIModule( uint8_t SPIModule, uint32_t baudRateInBps, uint8_t transferSizeInBits, uint8_t peripheralChipSelects, uint8_t chipSelectPolarity, uint8_t clockPolarity, uint8_t clockPhase, BOOL doutHiz, uint8_t csToClockDelay, uint8_t delayAfterTransfer)

◆ DSPIModule() [2/2]

DSPIModule::DSPIModule	(	uint8_t	SPIModule,
		uint32_t	baudRateInBps,
		uint8_t	transferSizeInBits = 8,
		uint8_t	peripheralChipSelects = 0x00,
		uint8_t	chipSelectPolarity = 0x0F,
		uint8_t	clockPolarity = 0,
		uint8_t	clockPhase = 1,
		BOOL	doutHiz = TRUE,
		uint8_t	csToClockDelay = 0,
		uint8_t	delayAfterTransfer = 0 )

DSPIModule Full DSPIModule Constructor. Will initialize all hardware settings.

Parameters

SPIModule	The DSPI module to use, from 1 to 3. Default is 1.
baudRateInBps	Maximum master clock frequency for SPI Bus in bits per second.
transferSizeInBits	Bit width of the transfers to be made.
peripheralChipSelects	Bit mask of which chipselects are active during transfers.
chipSelectPolarity	Bit mask of the inactive state of chipselects.
clockPolarity	Inactive level for the clock signal.
clockPhase	Clock phase: 0: data captured on leading edge of DSPI_CLK, changed on following edge. 1: data changed on leading edge of DSPI_CLK, captured on following edge.

Parameters

doutHiz	Data output is high impedance between transfers (instead of driven).
csToClockDelay	Delay from chip select to valid clock. The default of 0 will set the delay as close to 1/2 DSPI_CLK without going under, keeping with the interface to QSPI driver.
delayAfterTransfer	Delay between data transfers. The default of 0 is 17/(system clock / 2), in keeping with interface to QSPI

See also: DSPIModule::DSPIModule( uint8_t SPIModule ); DSPIModule::Init( uint8_t SPIModule, uint32_t baudRateInBps, uint8_t transferSizeInBits, uint8_t peripheralChipSelects, uint8_t chipSelectPolarity, uint8_t clockPolarity, uint8_t clockPhase, BOOL doutHiz, uint8_t csToClockDelay, uint8_t delayAfterTransfer )

Member Function Documentation

◆ ClrSem()

bool DSPIModule::ClrSem ( )

inline

Clears the semaphore registration.

Returns: Returns whether the registration was successfully cleared.

◆ DisableDMA()

bool DSPIModule::DisableDMA ( )

inline

DisableDMA disables DMA for all transactions.

Returns: Returns whether DMA is allowed

◆ Done() [1/2]

bool DSPIModule::Done ( )

inline

Returns whether the previously started transaction is complete.

Returns: Whether the previously started transaction is complete

◆ Done() [2/2]

static BOOL DSPIModule::Done ( uint8_t SPIModule )

static

Returns whether the previously started transaction for a given hardware module is complete.

Parameters

SPIModule The hardware instance to check the transaction state for.

Returns: Whether the previously started transaction is complete

◆ EnableDMA()

bool DSPIModule::EnableDMA ( bool enableDMA = true )

EnableDMA configures whether DMA is allowed for qualifying transactions.

Parameters

enableDMA Whether DMA is allowed

Returns: Returns whether DMA is allowed

◆ GetActualBaudrate()

uint32_t DSPIModule::GetActualBaudrate ( )

inline

Returns the actual bus speed to be used.

Returns: The actual bus speed to be used.

◆ GetSem()

OS_SEM * DSPIModule::GetSem ( )

inline

Gets a pointer to the registered Semaphore.

Returns: Pointer to the registered Semaphore

◆ Init()

uint8_t DSPIModule::Init	(	uint32_t	baudRateInBps = 2000000,
		uint8_t	transferSizeInBits = 8,
		uint8_t	peripheralChipSelects = 0x00,
		uint8_t	chipSelectPolarity = 0x0F,
		uint8_t	clockPolarity = 0,
		uint8_t	clockPhase = 1,
		BOOL	doutHiz = TRUE,
		uint8_t	csToClockDelay = 0,
		uint8_t	delayAfterTransfer = 0 )

DSPIModule Full DSPIModule Constructor. Will initialize all hardware settings.

param SPIModule The instance number of the hardware module to use with this driver context.

Parameters

baudRateInBps	Maximum master clock frequency for SPI Bus
transferSizeInBits	Bit width of the transfers to be made
peripheralChipSelects	Bit mask of which chipselects are active during transfers
chipSelectPolarity	Bit mask of the inactive state of chipselects
clockPolarity	Inactive level for the clock signal
clockPhase	0: data captured on leading edge of DSPI_CLK, changed on following edge 1: data changed on leading edge of DSPI_CLK, captured on following edge

Parameters

doutHiz	Data output is high impedance between transfers (instead of driven)
csToClockDelay	Delay form chip select to valid clock. The default of 0 will set the delay as close to 1/2 DSPI_CLK without going under, keeping with the interface to QSPI driver.
delayAfterTransfer	Delay between data transfers. The default of 0 is 17/(system clock / 2), in keepin with interface to QSPI

See also: DSPIModule::DSPIModule( uint8_t SPIModule, uint32_t baudRateInBps, uint8_t transferSizeInBits, uint8_t peripheralChipSelects, uint8_t chipSelectPolarity, uint8_t clockPolarity, uint8_t clockPhase, BOOL doutHiz, uint8_t csToClockDelay, uint8_t delayAfterTransfer)

◆ RegisterSem()

bool DSPIModule::RegisterSem ( OS_SEM * finishedSem )

Registers a semaphore to be posted to upon completion of transactions.

Parameters

finishedSem A pointer to the semaphore to be posted to.

Returns: Returns whether the semaphore was successfully registered.

◆ Rx()

uint8_t DSPIModule::Rx	(	uint8_t *	receiveBufferPtr,
		uint32_t	byteCount,
		int	csReturnToInactive = DEASSERT_AFTER_LAST )

inline

Rx begins a receive only SPI transaction using the provided buffer. Holds output line low during transfers.

Parameters

receiveBufferPtr	A pointer to the buffer to write received data to. If the buffer is NULL, then receive data will silently be discarded.
byteCount	The number of bytes to send and receive in this transaction. The value must be a multiple of the number of bytes in each individual transfer.
csReturnToInactive	Configures when the ChipSelect that is used for the transaction should be deasserted and return to being inactive.

See also: csReturnType

Returns: Non-zero on error

◆ SetCS()

bool DSPIModule::SetCS ( uint8_t CS )

inline

Modifies the chip select configuration for the driver context such that only the requested chip select is active during transfers.

Parameters

CS	The chip select number to assert during transfers.

Returns: Whether the active chip select was successfully updated.

◆ Start()

uint8_t DSPIModule::Start	(	uint8_t *	transmitBufferPtr,
		volatile uint8_t *	receiveBufferPtr,
		uint32_t	byteCount,
		int	csReturnToInactive = DEASSERT_AFTER_LAST )

Start begins a SPI transaction using the provided buffers.

Parameters

transmitBufferPtr	A pointer to the buffer containing data to be sent out. If the buffer is NULL, the bus will be held low instead.
receiveBufferPtr	A pointer to the buffer to write received data to. If the buffer is NULL, then receive data will silently be discarded.
byteCount	The number of bytes to send and receive in this transaction. The value must be a multiple of the number of bytes in each individual transfer.
csReturnToInactive	Configures when the ChipSelect that is used for the transaction should be deasserted and return to being inactive.

See also: csReturnType

Returns: Non-zero on error

◆ Tx()

uint8_t DSPIModule::Tx	(	uint8_t *	transmitBufferPtr,
		uint32_t	byteCount,
		int	csReturnToInactive = DEASSERT_AFTER_LAST )

inline

Tx begins a transmit only SPI transaction using the provided buffer. Silently discards the received data.

Parameters

transmitBufferPtr	A pointer to the buffer containing data to be sent out. If the buffer is NULL, the bus will be held low instead.
byteCount	The number of bytes to send and receive in this transaction. The value must be a multiple of the number of bytes in each individual transfer.
csReturnToInactive	Configures when the ChipSelect that is used for the transaction should be deasserted and return to being inactive.

See also: csReturnType

Returns: Non-zero on error

Friends And Related Symbol Documentation

◆ DSPIInit

uint8_t DSPIInit	(	uint8_t	SPIModule = DEFAULT_DSPI_MODULE,
		uint32_t	Baudrate = 2000000,
		uint8_t	QueueBitSize = 8,
		uint8_t	CS = 0x00,
		uint8_t	CSPol = 0x0F,
		uint8_t	ClkPolarity = 0,
		uint8_t	ClkPhase = 1,
		BOOL	DoutHiz = TRUE,
		uint8_t	QCD = 0,
		uint8_t	DTL = 0 )

friend

Initialize a DSPI module.

Notes:

The maximum baud rate is CPU_CLOCK / 3
Will initialize to the highest available baud rate that does not exceed the maximum
If configured for 8 bits per transfer then the data must be uint8_t aligned
If configured for greater than 8 bits per transfer then the data must be uint16_t aligned
If configured for greater than 16 bits per transfer then the data must be uint32_t aligned
Chip select is based on chipSelectPolarity
0 data captured leading edge of DSPI_CLK, changed following edge.
1 data changed leading edge of DSPI_CLK, captured following edge.
0 default is as close to 1/2 DSPI_CLK without going under, keeping with the interface to SPI
0 default is 17/(system clock / 2), in keeping with interface to QSPI

Parameters

SPIModule	SPI module number, 0 - 1
Baudrate	Maximum baud rate requested
QueueBitSize	Number of bits per transfer: 8, 16 or 32
CS	SPI chip selects to use for transfer
CSPol	0 = inactive logic level low, 1 = high
ClkPolarity	0 = inactive logic level low, 1 = high
ClkPhase	0 = data captured leading edge clock, changed following edge. 1 = data changed leading edge clock, captured following edge.
DoutHiz	Data output high impedance between transfers
QCD	Delay from chip select to valid clock (default is 0). QCD is a value in the QDLYR register and will change the delay between the assertion of the chip select and the start of the DSPI clock. Default setting of one half DSPI clk will be used if parameter is specified as 0x0 or not included.
DTL	DTL is a value in the QDLYR register and will change the delay following a tranfer of a single uint16_t in the DSPI queue. Default reset value of 17/(fsys/2) will be used if parameter is specified 0 or not included.

Returns: Current stat of DSPI bus MOD5441xDspiStates

Notes:

The maximum baud rate is CPU_CLOCK / 3
Will initialize to the highest available baud rate that does not exceed the maximum
If configured for 8 bits per transfer then the data must be uint8_t aligned
If configured for greater than 8 bits per transfer then the data must be uint16_t aligned
If configured for greater than 16 bits per transfer then the data must be uint32_t aligned
Chip select is based on chipSelectPolarity
0 data captured leading edge of DSPI_CLK, changed following edge.
1 data changed leading edge of DSPI_CLK, captured following edge.
0 default is as close to 1/2 DSPI_CLK without going under, keeping with the interface to SPI
0 default is 17/(system clock / 2), in keeping with interface to QSPI

Parameters

SPIModule	SPI module number, 0 - 1
Baudrate	Maximum baud rate requested
QueueBitSize	Number of bits per transfer: 8, 16 or 32
CS	SPI chip selects to use for transfer
CSPol	0 = inactive logic level low, 1 = high
ClkPolarity	0 = inactive logic level low, 1 = high
ClkPhase	0 = data captured leading edge clock, changed following edge. 1 = data changed leading edge clock, captured following edge.
DoutHiz	Data output high impedance between transfers
QCD	Delay from chip select to valid clock (default is 0)
DTL	Chip select mode dspiChipSelectMode

Returns: Current stat of DSPI bus dspiState

The documentation for this class was generated from the following file:

coldfire/cpu/MCF5441X/include/dspi.h

Public Member Functions

Static Public Member Functions

Friends

Detailed Description

Constructor & Destructor Documentation

◆ DSPIModule() [1/2]

◆ DSPIModule() [2/2]

Member Function Documentation

◆ ClrSem()

◆ DisableDMA()

◆ Done() [1/2]

◆ Done() [2/2]

◆ EnableDMA()

◆ GetActualBaudrate()

◆ GetSem()

◆ Init()

◆ RegisterSem()

◆ Rx()

◆ SetCS()

◆ Start()

◆ Tx()

Friends And Related Symbol Documentation

◆ DSPIInit