SPI

Topics
	MCF5441x (DSPI)
	DSPI for MCF5441x (MOD5441x, NANO, SB800EX)
	MCF5441x (Queued SPI 2.x compatibility layer)
	QSPI for MCF5441x (MOD5441x, NANO, SB800EX)
	MIMX10xx (DSPI)
	DSPI for ARM MIMX10xx (SOMRT1061)
	SAME70 (DSPI)
	DSPI for ARM SAME70 (MODM7AE70, SBE70LC)
	SAME70 (QuadSPI)
	QSPI for SAME70 (MODM7AE70, SBE70LC)
	SAME70 (USART)
	USART for SAME70 (MODM7AE70, SBE70LC)

Detailed Description

Serial Peripheral Interface (SPI) is an interface bus commonly used to send data between microcontrollers and small peripherals over a short distance, such as port expanders, FPGAs, CPLDs, shift registers, sensors, and flash SD cards. Unlike an asynchronous UART that does not use a separate clock, the SPI operates in a synchronous mode using a single clock for both sender and receiver that determines the data rate as well as when each bit of data is valid. This API uses the "native" SPI mode with the following signals:

• Clock (CLK). Synchronous clock signal.
• Master out, Slave in (MOSI). Data signal from master to slave device.
• Master in, Slave out (MISO). Data signal from slave to master.
• Chip select (CS). Chip selects can be part of the SPI peripheral, or can be general purpose I/O.

An advantage of SPI is that the receiving hardware can be a simple shift register. This is a much simpler and less expensive than a UART implementation.