EBI_CS_cfg_t Struct Reference

Configuration structure for an External Bus Interface (EBI) chip select. More...

#include <ebi.h>

Public Attributes
uint8_t	ncs_rd_setup
uint8_t	nrd_setup
uint8_t	ncs_wr_setup
uint8_t	nwe_setup
uint8_t	ncs_rd_pulse
uint8_t	nrd_pulse
uint8_t	ncs_wr_pulse
uint8_t	nwe_pulse
uint16_t	nrd_cycles
uint16_t	nwe_cycles
uint8_t	tdf_cycles
EBI_CS_BusWidth_t	busWidth
EBI_CS_ByteAccess_t	byteAccess
EBI_CS_NWait_t	nWait
EBI_CS_WrMode_t	wrMode
EBI_CS_RdMode_t	rdMode

Detailed Description

Configuration structure for an External Bus Interface (EBI) chip select.

This structure defines all timing and control parameters for a single chip select on the External Bus Interface. It controls setup times, pulse widths, cycle lengths, and operational modes for interfacing with external memory or peripheral devices.

The timing parameters are specified in clock cycles and use formulas to extend the range of values that can be represented in the limited bit fields.

Note

All timing values are expressed in EBI clock cycles. Calculate actual times by dividing by your EBI clock frequency.

Setup + Pulse widths should not exceed the total cycle length. The hold time is implicitly: Hold = Total_Cycles - (Setup + Pulse)

Warning

Incorrect timing configuration can result in data corruption, device malfunction, or bus hangs. Always consult your external device datasheet for minimum timing requirements.

Timing Diagram Reference

Read Cycle:

NCS:   ────┐                   ┌──────
           │                   │
           └───────────────────┘
           │<-setup->│<─pulse->│<hold>│
NRD:   ────────┐           ┌──────────
               │           │
               └───────────┘
               │<-setup->│<-pulse->│
DATA:  ------------X===VALID===X------
                               │<TDF>│
       │<--------- nrd_cycles --------->│

Write Cycle:

NCS:   ──────┐                   ┌──────
             │                   │
             └───────────────────┘
             │<-setup->│<-pulse->│<hold>│
              
 NWE:   ────────────┐           ┌─────────
                    │           │
                    └───────────┘
                    │<-setup->│<-pulse->│
                    
 DATA:  ------------X===VALID===X---------
        │<---------- nrd_cycles --------->│

See also

EBI_CS_BusWidth_t

EBI_CS_ByteAccess_t

EBI_CS_NWait_t

EBI_CS_WrMode_t

EBI_CS_RdMode_t

---

Expand for Example Usage

Examples

Example 1: Fast SRAM configuration (70ns access time)

// Assuming 150 MHz EBI clock (6.67 ns per cycle)
// SRAM requires: 10ns setup, 70ns pulse, 10ns hold
 
EBI_CS_cfg_t sramConfig = {
    // Read timing
    .ncs_rd_setup = 2,      // ~13ns (2 cycles)
    .nrd_setup = 2,         // ~13ns
    .ncs_rd_pulse = 11,     // ~73ns (11 cycles)
    .nrd_pulse = 11,        // ~73ns
    .nrd_cycles = 15,       // ~100ns total (15 cycles)
    
    // Write timing (same as read for this SRAM)
    .ncs_wr_setup = 2,      // ~13ns
    .nwe_setup = 2,         // ~13ns
    .ncs_wr_pulse = 11,     // ~73ns
    .nwe_pulse = 11,        // ~73ns
    .nwe_cycles = 15,       // ~100ns total
    
    // Additional parameters
    .tdf_cycles = 2,        // 2 cycles data float time
    .busWidth = EBI_BUS_WIDTH_16,
    .byteAccess = EBI_BYTE_ACCESS_WRITE,
    .nWait = EBI_NWAIT_DISABLED,
    .wrMode = EBI_WRITE_MODE_NWE,
    .rdMode = EBI_READ_MODE_NRD
};
 
iprintf("Fast SRAM configured: 70ns access time\r\n");

Example 2: Slow flash memory configuration (120ns access)

// Assuming 100 MHz EBI clock (10 ns per cycle)
// Flash requires: 20ns setup, 120ns pulse, 20ns hold
 
EBI_CS_cfg_t flashConfig = {
    // Read timing
    .ncs_rd_setup = 2,      // 20ns (2 cycles)
    .nrd_setup = 2,         // 20ns
    .ncs_rd_pulse = 12,     // 120ns (12 cycles)
    .nrd_pulse = 12,        // 120ns
    .nrd_cycles = 16,       // 160ns total (16 cycles)
    
    // Write timing (flash writes are slower)
    .ncs_wr_setup = 3,      // 30ns
    .nwe_setup = 3,         // 30ns
    .ncs_wr_pulse = 20,     // 200ns (longer for programming)
    .nwe_pulse = 20,        // 200ns
    .nwe_cycles = 26,       // 260ns total
    
    // Additional parameters
    .tdf_cycles = 3,        // 3 cycles data float
    .busWidth = EBI_BUS_WIDTH_8,
    .byteAccess = EBI_BYTE_ACCESS_SELECT,
    .nWait = EBI_NWAIT_FROZEN,  // Flash can extend cycles
    .wrMode = EBI_WRITE_MODE_NWE,
    .rdMode = EBI_READ_MODE_NRD
};
 
iprintf("Flash memory configured with NWAIT support\r\n");

Example 3: Simple 8-bit I/O device (minimal timing)

// Assuming 120 MHz EBI clock (8.33 ns per cycle)
// Simple device with relaxed timing: 25ns setup, 50ns pulse
 
EBI_CS_cfg_t ioConfig = {
    // Read timing
    .ncs_rd_setup = 3,      // ~25ns (3 cycles)
    .nrd_setup = 3,         // ~25ns
    .ncs_rd_pulse = 6,      // ~50ns (6 cycles)
    .nrd_pulse = 6,         // ~50ns
    .nrd_cycles = 10,       // ~83ns total
    
    // Write timing (same as read)
    .ncs_wr_setup = 3,      // ~25ns
    .nwe_setup = 3,         // ~25ns
    .ncs_wr_pulse = 6,      // ~50ns
    .nwe_pulse = 6,         // ~50ns
    .nwe_cycles = 10,       // ~83ns total
    
    // Additional parameters
    .tdf_cycles = 1,        // Minimal data float
    .busWidth = EBI_BUS_WIDTH_8,
    .byteAccess = EBI_BYTE_ACCESS_SELECT,
    .nWait = EBI_NWAIT_DISABLED,
    .wrMode = EBI_WRITE_MODE_NCS,  // Use CS for control
    .rdMode = EBI_READ_MODE_NCS
};
 
iprintf("Simple I/O device configured\r\n");

Example 4: Extended timing range using formula (slow device)

// Device requires very long access time: 1 microsecond
// Assuming 100 MHz EBI clock (10 ns per cycle)
// Need 100 cycles for 1us pulse
 
EBI_CS_cfg_t slowConfig = {
    // Using extended range formula for pulse:
    // nrd_pulse[6] = 0, nrd_pulse[5:0] = 100 won't work (max 63)
    // Need to use bit 6: pulse = 256*0 + 100 = 100 cycles
    // But 100 > 63, so we need bit 6 set
    // Actually: 256*0 + 100 still exceeds 6 bits
    // Correct approach: For 100 cycles, we can't fit in 6 bits alone
    // Let's use a realistic long pulse: 200 cycles = 2us
    
    .ncs_rd_setup = 10,     // 100ns
    .nrd_setup = 10,        // 100ns
    .ncs_rd_pulse = 200,    // 2us (bit 6 will be set automatically)
    .nrd_pulse = 200,       // 2us
    .nrd_cycles = 220,      // 2.2us total
    
    .ncs_wr_setup = 10,
    .nwe_setup = 10,
    .ncs_wr_pulse = 200,
    .nwe_pulse = 200,
    .nwe_cycles = 220,
    
    .tdf_cycles = 5,        // Longer data float time
    .busWidth = EBI_BUS_WIDTH_16,
    .byteAccess = EBI_BYTE_ACCESS_WRITE,
    .nWait = EBI_NWAIT_READY,
    .wrMode = EBI_WRITE_MODE_NWE,
    .rdMode = EBI_READ_MODE_NRD
};
 
iprintf("Very slow device configured: 2us access time\r\n");

Example 5: Helper function to calculate timing from nanoseconds

void CalculateEBI_Timing(uint32_t clockFreqMHz, uint32_t setupNs,
                         uint32_t pulseNs, uint32_t holdNs,
                         EBI_CS_cfg_t *config)
{
    // Calculate cycles needed (round up)
    float nsPerCycle = 1000.0f / clockFreqMHz;
    
    uint8_t setupCycles = (uint8_t)((setupNs + nsPerCycle - 1) / nsPerCycle);
    uint8_t pulseCycles = (uint8_t)((pulseNs + nsPerCycle - 1) / nsPerCycle);
    uint8_t holdCycles = (uint8_t)((holdNs + nsPerCycle - 1) / nsPerCycle);
    
    uint16_t totalCycles = setupCycles + pulseCycles + holdCycles;
    
    // Apply to both read and write (can be customized)
    config->ncs_rd_setup = setupCycles;
    config->nrd_setup = setupCycles;
    config->ncs_rd_pulse = pulseCycles;
    config->nrd_pulse = pulseCycles;
    config->nrd_cycles = totalCycles;
    
    config->ncs_wr_setup = setupCycles;
    config->nwe_setup = setupCycles;
    config->ncs_wr_pulse = pulseCycles;
    config->nwe_pulse = pulseCycles;
    config->nwe_cycles = totalCycles;
    
    iprintf("Calculated timing: %u setup, %u pulse, %u hold cycles\r\n",
            setupCycles, pulseCycles, holdCycles);
}
 
void UserMain(void *pd) {
    init();
    
    EBI_CS_cfg_t myConfig = {0};
    myConfig.busWidth = EBI_BUS_WIDTH_16;
    myConfig.wrMode = EBI_WRITE_MODE_NWE;
    myConfig.rdMode = EBI_READ_MODE_NRD;
    myConfig.nWait = EBI_NWAIT_DISABLED;
    myConfig.tdf_cycles = 2;
    
    // Calculate timing for 150 MHz clock, 20ns setup, 70ns pulse, 10ns hold
    CalculateEBI_Timing(150, 20, 70, 10, &myConfig);
    
    while(1) {
        OSTimeDly(TICKS_PER_SECOND);
    }
}

Example 6: Validating timing configuration

bool ValidateEBI_Timing(const EBI_CS_cfg_t *config)
{
    // Check TDF cycles range
    if (config->tdf_cycles > 15) {
        iprintf("Error: tdf_cycles must be 0-15\r\n");
        return false;
    }
    
    // Verify read timing makes sense
    uint16_t rdSetup = config->ncs_rd_setup;
    uint16_t rdPulse = config->ncs_rd_pulse;
    if ((rdSetup + rdPulse) > config->nrd_cycles) {
        iprintf("Error: Read setup+pulse exceeds total cycles\r\n");
        return false;
    }
    
    // Verify write timing makes sense
    uint16_t wrSetup = config->ncs_wr_setup;
    uint16_t wrPulse = config->ncs_wr_pulse;
    if ((wrSetup + wrPulse) > config->nwe_cycles) {
        iprintf("Error: Write setup+pulse exceeds total cycles\r\n");
        return false;
    }
    
    iprintf("EBI timing configuration valid\r\n");
    return true;
}
 
void ConfigureEBI_WithValidation() {
    EBI_CS_cfg_t config = {
        .ncs_rd_setup = 2, .nrd_setup = 2,
        .ncs_rd_pulse = 10, .nrd_pulse = 10,
        .nrd_cycles = 15,
        .ncs_wr_setup = 2, .nwe_setup = 2,
        .ncs_wr_pulse = 10, .nwe_pulse = 10,
        .nwe_cycles = 15,
        .tdf_cycles = 2,
        .busWidth = EBI_BUS_WIDTH_16,
        .wrMode = EBI_WRITE_MODE_NWE,
        .rdMode = EBI_READ_MODE_NRD,
        .nWait = EBI_NWAIT_DISABLED
    };
    
    if (ValidateEBI_Timing(&config)) {
        // Apply configuration to hardware
        iprintf("Configuration validated and applied\r\n");
    }
}

---

---

The documentation for this struct was generated from the following file:

• ebi.h