sai.h

 
/*NB_REVISION*/
 
/*NB_COPYRIGHT*/
 
#include <predef.h>
#include <sim.h>
#include <nbrtos.h>
#include <edma.h>
 
#define SAI_HW_COUNT    3
#define SAI_TXBD_COUNT  4
#define SAI_RXBD_COUNT  4
 
// class SAI_I2S : private Ssc {
//
//
// public:
//     inline void Reset() { SAI_CR = SAI_CR_SWRST; }
//     inline void EnableTx(bool enable) {
//         SAI_CR = (enable ? SAI_CR_TXEN : SAI_CR_TXDIS);
//     }
//     inline void EnableRx(bool enable) {
//         SAI_CR = (enable ? SAI_CR_RXEN : SAI_CR_RXDIS);
//     }
//     inline uint16_t SetClkDiv(uint16_t div) {
//         return SAI_CMR = div & SAI_CMR_DIV_Msk;
//     }
//
//     static Ssc *get() { return reinterpret_cast<SAI_I2S*>(SAI); }
//     Ssc &GetRegisers() { return *this; }
//
// } __attribute__((packed));
//
// static_assert( sizeof (SAI_I2S == sizeof(Ssc) );
//
 
// doneInvalid < -1, channel error, buffer state unchanged
// doneInvalid == -1, transfer error, buffer retired
// doneInvalid == 0, Half transferred, second half still in progress
// doneInvalid > 0, Buffer completely transferred
typedef void (*SAI_BufferDoneFn_t)(void *buffer, int doneInvalid);
/****************************************/
/*      SAI Configuration Enums         */
/****************************************/
enum clkSrc_t
{
    CLK_SRC_MCK, 
    CLK_SRC_EXT, 
};
 
enum clkCh_t
{
    CLK_CH_CH, 
    CLK_CH_RK, 
    CLK_CH_TK, 
};
 
enum clkPol_t
{
    CLK_ACTIVE_HIGH, 
    CLK_ACTIVE_LOW,  
};
 
enum frameSyncCh_t
{
    SYNC_CH_CH,  
    SYNC_CH_RX,  
    SYNC_CH_TX   
};
 
enum startCond_t
{
    START_CONTINUOUS,
    START_SYNC_RX_TX,
    START_FRAME_LOW,
    START_FRAME_HIGH,
    START_FRAME_FALLING,
    START_FRAME_RISING,
    START_FRAME_LEVEL,
    START_FRAME_EDGE,
    START_CMP_0
};
 
enum clkGate_t
{
    CLK_GATE_CONTINUOUS, 
    CLK_GATE_FRAME_LOW,  
    CLK_GATE_FRAME_HIGH, 
};
 
enum frameEdge_t
{
    FRAME_SYNC_RISING, 
    FRAME_SYNC_FALLING 
};
 
enum clkOut_t
{
    CLK_OUT_INPUT,      
    CLK_OUT_CONTINUOUS, 
    CLK_OUT_TRANSFER    
};
 
enum frameSyncOut_t
{
    FRAME_SYNC_INPUT,    
    FRAME_SYNC_NEGATIVE, 
    FRAME_SYNC_POSITIVE, 
};
 
enum dataPacking_t
{
    BUFFER_WORD8,       
    BUFFER_WORD16_LEFT, 
    BUFFER_WORD16_RIGHT,
//    BUFFER_WORD24_LEFT, /**< Buffer Word is 24 bits, data is Left Justified */
//    BUFFER_WORD24_RIGHT,/**< Buffer Word is 24 bits, data is Right Justified */
    BUFFER_WORD32_LEFT, 
    BUFFER_WORD32_RIGHT,
};
 
enum bitOrder_t
{
    LEAST_SIG_FIRST, 
    MOST_SIG_FIRST   
};
 
enum bufferDepletionBehavior_t
{
    DEPLETED_PAUSE,
    DEPLETED_REPEAT_LAST,
};
 
enum rxTxSync_t
{
    RXTX_ASYNC,     
    RXTX_SYNC_RX,   
    RXTX_SYNC_TX    
};
 
/****************************************/
/*      SAI Configuration Struct        */
/****************************************/
 
struct SAI_rxtx_cfg_t
{
    bool enable{false};
    uint8_t startDly{1};
    startCond_t startCond{START_FRAME_EDGE};
    clkGate_t clkGate{CLK_GATE_CONTINUOUS};
    clkOut_t clkOut{CLK_OUT_CONTINUOUS};
    clkSrc_t clkSrc{CLK_SRC_MCK};
    clkCh_t  clkCh{CLK_CH_CH};
    clkPol_t clkPol{CLK_ACTIVE_HIGH};
 
    uint8_t syncLen{0};
    frameEdge_t syncEdge{FRAME_SYNC_FALLING};
    frameSyncOut_t syncOut{FRAME_SYNC_INPUT};
    frameSyncCh_t syncCh{SYNC_CH_CH};
    uint8_t wordsPerFrame{2};
    dataPacking_t dataPacking{BUFFER_WORD32_RIGHT};
    bool unifyDataStream{false};
    bitOrder_t bitOrder{MOST_SIG_FIRST};
    bool lineIdleState{1};
    uint8_t bitsPerWord{24};
    uint32_t wordMask{0};
 
    bufferDepletionBehavior_t depletionBehavior{DEPLETED_PAUSE};
};
 
struct SAI_cfg_t
{
    uint32_t txClkFreq{12288000};
    uint32_t rxClkFreq{12288000};
    rxTxSync_t rxTxSync{RXTX_ASYNC};
//    uint32_t mclkFreq{0};
 
    I2S_Type *sai;
    SAI_rxtx_cfg_t rx;
    SAI_rxtx_cfg_t tx;
};
 
extern const SAI_cfg_t SAI_I2S_SLAVE_24_TXRX_RK;
extern const SAI_cfg_t SAI_I2S_SLAVE_24_TXRX_TK;
extern const SAI_cfg_t SAI_I2S_SLAVE_24_TXRX_TKRK;
extern const SAI_cfg_t SAI_I2S_SLAVE_16_TXRX_RK;
extern const SAI_cfg_t SAI_I2S_SLAVE_16_TXRX_TK;
extern const SAI_cfg_t SAI_I2S_SLAVE_16_TXRX_TKRK;
extern const SAI_cfg_t SAI_I2S_SLAVE_8_TXRX_RK;
extern const SAI_cfg_t SAI_I2S_SLAVE_8_TXRX_TK;
extern const SAI_cfg_t SAI_I2S_SLAVE_8_TXRX_TKRK;
 
extern const SAI_cfg_t SAI_LJUST_SLAVE_24_TXRX_RK;
extern const SAI_cfg_t SAI_LJUST_SLAVE_24_TXRX_TK;
extern const SAI_cfg_t SAI_LJUST_SLAVE_24_TXRX_TKRK;
extern const SAI_cfg_t SAI_LJUST_SLAVE_16_TXRX_RK;
extern const SAI_cfg_t SAI_LJUST_SLAVE_16_TXRX_TK;
extern const SAI_cfg_t SAI_LJUST_SLAVE_16_TXRX_TKRK;
extern const SAI_cfg_t SAI_LJUST_SLAVE_8_TXRX_RK;
extern const SAI_cfg_t SAI_LJUST_SLAVE_8_TXRX_TK;
extern const SAI_cfg_t SAI_LJUST_SLAVE_8_TXRX_TKRK;
 
/****************************************/
/*      SAI Driver Context Object       */
/****************************************/
 
class SAICtx_t
{
   public:
    enum ctxState_t
    {
        CTX_STATE_STOPPED,
        CTX_STATE_INIT,
        CTX_STATE_TX,
        CTX_STATE_RX,
        CTX_STATE_TXRX,
    };
private:
    static DmaTcd sDmaTcd[SAI_HW_COUNT][SAI_TXBD_COUNT+SAI_RXBD_COUNT];
    static SAICtx_t *sCtx[SAI_HW_COUNT];
    static int sDmaIsr(void *ctx, DmaCh *dmaCh, bool haveError);
    static void sIsr();
 
   private:
    I2S_Type *sai;
    DmaCh *txDma;
    uint32_t txBDFlag;
    DmaCh *rxDma;
    uint32_t rxBDFlag;
 
    OS_SEM txSem;
    OS_SEM rxSem;
    SAI_BufferDoneFn_t txBufDone;
    SAI_BufferDoneFn_t rxBufDone;
    uint32_t txReadyCount;
    uint32_t rxReadyCount;
    uint32_t nTxIrq;
    uint32_t nTxErr;
    uint32_t nTxPost;
    uint32_t nTxCall;
    uint32_t nTxStart;
    uint32_t nTxAdd;
 
    uint32_t nRxIrq;
    uint32_t nRxErr;
    uint32_t nRxPost;
    uint32_t nRxCall;
    uint32_t nRxStart;
    uint32_t nRxAdd;
 
    uint8_t  stickyTxErr;
    uint8_t  stickyRxErr;
 
//    uint8_t rxByteWidth;
//    uint8_t txByteWidth;
 
    ctxState_t state;
    void InitBDs();
    void initHw_Pins(const SAI_cfg_t &cfg);
    void initHw_SAI(const SAI_cfg_t &cfg);
    void initHw_DMA(const SAI_cfg_t &cfg);
 
    int validateClockSync(const SAI_cfg_t &cfg) const;
    int validateCfg(const SAI_cfg_t &cfg) const;
    int InitClocks(uint32_t *saiClk, uint32_t divRem);
 
    DmaTcd &getFirstTxBD() const;
    DmaTcd &getLastTxBD() const;
    DmaTcd &getNextTxBD() const;
 
    DmaTcd &getFirstRxBD() const;
    DmaTcd &getLastRxBD() const;
    DmaTcd &getNextRxBD() const;
 
    DmaTcd &getFirstBD(const DmaCh *dma) const;
    DmaTcd &getLastBD(const DmaCh *dma) const;
    DmaTcd &getNextBD(const DmaCh *dma) const;
 
    int queueBuffer(void *buffer, uint32_t bufferLen, bool waitIfNeeded, bool enableHalfNotify, DmaCh *dma);
 
    int getIdx() const;
 
    int DmaIsr(DmaCh *dma, bool haveError);
    void Isr();
 
   public:
    int Init(const SAI_cfg_t &cfg);
    void Shutdown();
 
    inline int GetMaxTxBuffers() { return SAI_TXBD_COUNT; }
    inline int GetMaxRxBuffers() { return SAI_RXBD_COUNT; }
 
    int getCurrentConfig(SAI_cfg_t &cfg);
    inline ctxState_t getState() const { return state; }
 
    int TransmitBuffer(void *buffer, uint32_t bufferLen, bool waitIfNeeded, bool enableHalfNotify= false);
 
    int ReadyReceiveBuffer(void *buffer, uint32_t bufferLen, bool waitIfNeeded, bool enableHalfNotify = false);
 
    void RegisterTxBufferCB(SAI_BufferDoneFn_t cb);
    void RegisterRxBufferCB(SAI_BufferDoneFn_t cb);
 
 
    inline void clrStickyTxError() { stickyTxErr = 0; }
    inline void clrStickyRxError() { stickyRxErr = 0; }
    inline uint8_t getStickyTxError() { return stickyTxErr; }
    inline uint8_t getStickyRxError() { return stickyRxErr; }
 
    void dump();
};
 
extern SAICtx_t sai;