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quadspi.h
1/*NB_REVISION*/
2
3/*NB_COPYRIGHT*/
4
24#ifndef _DMA_QUADSPI_H_INC
25#define _DMA_QUADSPI_H_INC
26
27#include <nbrtos.h>
28#include <basictypes.h>
29#include <xdmac.h>
30#include <dspi.h>
31
32#ifndef __cplusplus
33#error QuadSPI driver is a C++ only library
34#endif
35
36// #define __DEBUG_QUADSPI 1
37
38
43#define DEFAULT_QUADSPI_MODULE 0
44#define QUADSPI_MODULE_COUNT 1
53class SPI_QSPI : public SPI_SPI
54{
55protected:
56 static SPI_QSPI *lastQuadSPICtxs[QUADSPI_MODULE_COUNT];
57 static spiDriverStruct QuadSPIDriverCtx[QUADSPI_MODULE_COUNT];
58
59private:
60 uint32_t m_regSCR;
61
62 virtual void ReadyHW() override;
63 virtual spiDriverStruct *getCtx() override { return QuadSPIDriverCtx + m_moduleNum; }
64 inline Qspi * quadSpi() { return QSPI + m_moduleNum; }
65
66public:
67
68#ifdef __DEBUG_QUADSPI
69 virtual void dumpRegs() override;
70#endif
71
72
81 SPI_QSPI( uint8_t QuadSPIModule = DEFAULT_QUADSPI_MODULE);
82
103 SPI_QSPI( uint8_t QuadSPIModule, uint32_t baudRateInBps,
104 uint8_t transferSizeInBits = 8, uint8_t peripheralChipSelects = 0x00,
105 uint8_t chipSelectPolarity = 0x0F, uint8_t clockPolarity = 0,
106 uint8_t clockPhase = 1, BOOL doutHiz = TRUE,
107 uint8_t csToClockDelay = 0, uint8_t delayAfterTransfer = 0 );
108
127 virtual uint8_t Init( uint32_t baudRateInBps = 2000000,
128 uint8_t transferSizeInBits = 8, uint8_t peripheralChipSelects = 0x00,
129 uint8_t chipSelectPolarity = 0x0F, uint8_t clockPolarity = 0,
130 uint8_t clockPhase = 1, BOOL doutHiz = TRUE,
131 uint8_t csToClockDelay = 0, uint8_t delayAfterTransfer = 0 ) override;
132
142 virtual uint32_t SetBusSpeed(uint32_t maxSpeed) override;
143
159 virtual uint8_t Start( uint8_t *transmitBufferPtr, volatile uint8_t *receiveBufferPtr,
160 uint32_t byteCount, int csReturnToInactive = DEASSERT_AFTER_LAST ) override;
161
171 virtual inline uint8_t Tx( uint8_t *transmitBufferPtr, uint32_t byteCount,
172 int csReturnToInactive = DEASSERT_AFTER_LAST ) override
173 { return Start(transmitBufferPtr, NULL, byteCount, csReturnToInactive); }
174
184 inline uint8_t Rx( uint8_t *receiveBufferPtr, uint32_t byteCount, int csReturnToInactive = DEASSERT_AFTER_LAST )
185 { return Start(NULL, receiveBufferPtr, byteCount, csReturnToInactive); }
186
187 // The SAME70 always uses DMA. These functions kept here for reference to other platforms
188 // bool EnableDMA(bool enableDMA = true);
189 // inline bool DisableDMA() { return EnableDMA(false); }
190
191 /*
192 * @brief Register a semaphore for the SPI module.
193 *
194 * The SPI module will post to this semaphore when a transaction is complete
195 *
196 * @param finishedSem Pointer to the semaphore
197 *
198 * @return true if the registration was successful, false if a SPI transaction is in progress
199 */
200 // bool RegisterSem( OS_SEM *finishedSem );
201
202 /*
203 * @brief Clear a semaphore registration
204 *
205 * @return true if the clear was successful, false if a SPI transaction is in progress
206 */
207 // inline bool ClrSem() { return RegisterSem(NULL); }
208
209 /*
210 * @brief Obtain a pointer to the SPI finished semaphore
211 *
212 * @return A pointer to the semaphore
213 */
214 // inline OS_SEM * GetSem() { return m_finishedSem; }
215
216 /*
217 * @brief Function to check SPI status
218 *
219 * Called as a class method on a specific SPI object. For example: MySpi.Done()
220 *
221 * @return true if SPI is finished, false if active
222 */
223 // inline bool Done() { return !m_inProgress; }
224 // virtual inline bool Done() { return !m_inProgress; }
225
226 /*
227 * @brief Returns the active baud rate
228 *
229 * The baud rate will be set to the value specified when the SPI module is initialized.
230 * If that value is not possible, the next lowest baud rate will be chosen.
231 *
232 * @return m_busSpeed The actual SPI module baud rate
233 */
234 // inline uint32_t GetActualBaudrate() { return m_busSpeed; }
235
246 virtual inline bool SetCS( uint8_t CS ) override
247 {
248 OSLockObj lock;
249 return true;
250 }
251
252 // The ISR used by the QuadSPI driver. Internal use only (qspi.cpp).
253 friend void QuadSPI_DMA_Isr(XdmaCh_t *dma, int module);
254};
255
256#endif /* ----- #ifndef _DMA_QUADSPI_H_INC ----- */
257
The Single-Bit SPI mode QSPI Peripheral Class.
Definition quadspi.h:54
SPI_QSPI(uint8_t QuadSPIModule, uint32_t baudRateInBps, uint8_t transferSizeInBits=8, uint8_t peripheralChipSelects=0x00, uint8_t chipSelectPolarity=0x0F, uint8_t clockPolarity=0, uint8_t clockPhase=1, BOOL doutHiz=TRUE, uint8_t csToClockDelay=0, uint8_t delayAfterTransfer=0)
Create a SPI object and Initialize with parameters.
virtual uint32_t SetBusSpeed(uint32_t maxSpeed) override
Set the SPI bus speed Will attempt to set the desired bus speed. It may be different based on the ava...
SPI_QSPI(uint8_t QuadSPIModule=DEFAULT_QUADSPI_MODULE)
Create a SPI object.
uint8_t Rx(uint8_t *receiveBufferPtr, uint32_t byteCount, int csReturnToInactive=DEASSERT_AFTER_LAST)
Convenience function for unidirectional receive.
Definition quadspi.h:184
virtual uint8_t Init(uint32_t baudRateInBps=2000000, uint8_t transferSizeInBits=8, uint8_t peripheralChipSelects=0x00, uint8_t chipSelectPolarity=0x0F, uint8_t clockPolarity=0, uint8_t clockPhase=1, BOOL doutHiz=TRUE, uint8_t csToClockDelay=0, uint8_t delayAfterTransfer=0) override
Initialize an existing SPI object.
virtual bool SetCS(uint8_t CS) override
Set the chip select configuration for the SPI object's bus transactions.
Definition quadspi.h:246
virtual uint8_t Start(uint8_t *transmitBufferPtr, volatile uint8_t *receiveBufferPtr, uint32_t byteCount, int csReturnToInactive=DEASSERT_AFTER_LAST) override
Start a SPI transfer.
virtual uint8_t Tx(uint8_t *transmitBufferPtr, uint32_t byteCount, int csReturnToInactive=DEASSERT_AFTER_LAST) override
Convenience function for unidirectional transmit.
Definition quadspi.h:171
SPI Peripheral Module Class.
Definition cortex-m7/cpu/SAME70/include/dspi.h:138
@ DEASSERT_AFTER_LAST
Definition coldfire/cpu/MCF5441X/include/dspi.h:165
#define DEFAULT_QUADSPI_MODULE
Default QUADSPI module.
Definition quadspi.h:43
#define QUADSPI_MODULE_COUNT
Number of modules: 0, 1.
Definition quadspi.h:44
Variables/configurations for a DSPI transfer.
Definition cortex-m7/cpu/SAME70/include/dspi.h:114