NetBurner 3.5.8
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SOMRT1061 Quick Reference Card

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NetBurner System on Module with Dual 10/100 Ethernet 528MHz NXP i.MX RT1061 | 8MB Flash | 32MB SDRAM | 1MB SRAM | -40 to 85C

Minimum Connections for Operation

The following signals must be connected for the module to boot and run:

REQUIRED
+-- Power (3.3V) -- Minimum rise time: 2.4V/ms
| P1 Vcc ------- 3.3VDC supply (1A minimum)
| P38 Vcc ------- 3.3VDC supply
| P49 Vcc ------- 3.3VDC supply
|
+-- Ground (connect ALL)
| P5, P17, P39, P48, P60, P79
|
+-- Reset (RSTI / POR_B)
| P23 Held high or via reset button to GND
|
+-- That's it. Ethernet 0 PHY, SDRAM, and flash are on-module.
Signal Pins Why Required
Vcc P1, P38, P49 Powers all on-module logic, memory, and Ethernet 0 PHY
GND P5,17,39,48,60,79 Return path; connect all for low impedance
POR_B P23 Reset input (active low); has 100K pull-up + needs external

Power

Single 3.3V supply on P1, P38, P49 (DCDC_IN). The module's internal DCDC and LDO regulators derive all rails (1.0V SOC, 3.0V VDD_HIGH for USB PHY, 3.3V analog) from this input. Minimum rise rate: 2.4V/ms.

Reset

P23 (POR_B) is the active-low reset input. The module includes a 100K internal pull-up; a 5K external pull-up is recommended to improve noise immunity. A momentary switch from P23 to GND provides a manual reset.

Simplest possible carrier board: Connect 3.3V power, ground, and let P23 float (internal pull-up handles it). The module will boot, initialize Ethernet 0, and be reachable on the network with no other connections.

Connector Pinout

The SOMRT1061 module exposes 88 user pins on four 22-pin (11x2) 0.1" (2.54 mm) connectors: J1, J2, J3, J4. Pin 1 is at the corner of each connector.

J1 – Pins 1-22

J1
ODD | | EVEN
-------+-------+-------
Vcc | 1 2 | EMC_18 LPUART4_RTS / FLEXCAN1_RX
EMC_17| 3 4 | EMC_16 LPUART4_CTS / FLEXCAN1_TX | LPUART3_RTS
GND | 5 6 | EMC_15 LPUART3_CTS / SPDIF_OUT
EMC_14| 7 8 | EMC_13 LPUART3_RXD / LPUART3_TXD
EMC_12| 9 10 | EMC_11 LPI2C4_SCL / LPI2C4_SDA
EMC_10| 11 12 | EMC_09 FLEXCAN2_RX / FLEXCAN2_TX
EMC_08| 13 14 | EMC_00 XBAR1 / LPSPI2_SCK
EMC_01| 15 16 | EMC_02 LPSPI2_PCS0 / LPSPI2_SDO
GND | 17 18 | EMC_03 LPSPI2_SDI / FLEXPWM4
EMC_04| 19 20 | EMC_05 SAI2_TX_DATA / SAI2_TX_SYNC
EMC_06| 21 22 | EMC_07 SAI2_TX_BCLK / SAI2_MCLK

J2 – Pins 23-44

J2
ODD | | EVEN
-------+-------+-------
POR_B | 23 24 | SD_B0_03 Reset / USDHC1_DATA1, LPUART8_RTS
SD_B0_02| 25 26 | SD_B0_01 USDHC1_DATA0 / USDHC1_CLK
SD_B0_00| 27 28 | SD_B0_05 USDHC1_CMD / USDHC1_DATA3, LPUART8_RX
SD_B0_04| 29 30 | WAKEUP USDHC1_DATA2, LPUART8_TX / NMI
PMIC_STBY| 31 32 | USB_OTG2_VBUS PMIC_STBY_REQ / USB OTG2 power
USB_OTG2_DN| 33 34 | USB_OTG2_DP USB OTG2 data
USB_OTG1_VBUS| 35 36 | USB_OTG1_DN USB OTG1 power / data-
USB_OTG1_DP | 37 38 | Vcc USB OTG1 data+ / 3.3V
GND | 39 40 | AD_B1_00 GND / ADC1+2_5, USB_OTG2_ID, LPI2C1_SCL
AD_B1_01| 41 42 | AD_B1_02 ADC1+2_6, USB_OTG1_PWR / ADC1+2_7, LPUART2_TX
AD_B1_03| 43 44 | AD_B1_04 ADC1+2_8, LPUART2_RX / ADC1+2_9, ENET_MDC

J3 – Pins 45-66

J3
ODD | | EVEN
-------+-------+-------
AD_B1_05| 45 46 | AD_B1_06 ADC1+2_10, ENET_MDIO / ADC1+2_11, LPI2C3_SDA
AD_B1_07| 47 48 | GND ADC1+2_12, LPI2C3_SCL / GND
Vcc | 49 50 | B0_01 3.3V / QTIMER1, LPSPI4_SDI
B0_00 | 51 52 | B0_15 QTIMER1, LPSPI4_PCS0 / SAI1_RX_BCLK (tied to P89)
B0_14 | 53 54 | B0_13 SAI1_RX_SYNC (tied P90) / SAI1_MCLK, ARM_SWO
B0_12 | 55 56 | B1_00 SAI1_TX_DATA / LPUART4_TX, SAI1_RX_DATA
B1_02 | 57 58 | B1_01 LPSPI4_PCS2, SAI1_TX_BCLK / LPUART4_RX
B1_03 | 59 60 | GND LPSPI4_PCS1 / GND
ENET0 | 61 62 | ENET0 JLED2 / JLED1 (dedicated)
ENET0 | 63 64 | ENET0 ERXJ_N / ERXJ_P (dedicated)
ENET0 | 65 66 | ENET0 ETXJ_N / ETXJ_P (dedicated)

Note: Pins P61–P66 carry dedicated Ethernet 0 PHY differential pairs and LED signals. They are routed to the on-module integrated PHY and are not available for general-purpose use.

J4 – Pins 67-88

J4
ODD | | EVEN
-------+-------+-------
EMC_41| 67 68 | EMC_40 USB_OTG2_PWR, ENET_MDIO / USB_OTG2_OC, ENET_MDC
EMC_39| 69 70 | EMC_38 LPUART8_RX, SAI3_TX_SYNC / LPUART8_TX, SAI3_TX_BCLK
EMC_37| 71 72 | EMC_36 FLEXCAN3_RX / FLEXCAN3_TX
EMC_35| 73 74 | EMC_34 SAI3_RX_BCLK / SAI3_RX_SYNC
EMC_33| 75 76 | EMC_32 SAI3_RX_DATA / LPUART7_RX
EMC_31| 77 78 | EMC_30 LPUART7_TX / LPUART6_CTS, LPSPI1_PCS0
GND | 79 80 | EMC_29 GND / LPUART6_RTS, LPSPI1_SDI
EMC_28| 81 82 | EMC_27 LPUART5_CTS, LPSPI1_SDO / LPUART5_RTS, LPSPI1_SCK
EMC_26| 83 84 | EMC_25 LPUART6_RX / LPUART6_TX
EMC_24| 85 86 | EMC_23 LPUART5_RX, ENET_TX_EN / LPUART5_TX, ENET_RX_EN
EMC_20| 87 88 | EMC_19 LPUART4_RX, ENET_RDATA00 / LPUART4_TX, ENET_RDATA01

Power Summary

Parameter Value
Main supply (Vcc) 3.3VDC on P1, P38, P49
USB VBUS 5V on P32 (OTG2), P35 (OTG1)
Ground P5, P17, P39, P48, P60, P79

Current Draw at 3.3V (typical):

Configuration Current
No Ethernet 280 mA
1x 100MB Ethernet 320 mA
2x 100MB Ethernet 360 mA

Peripheral Availability Summary

Analog

Peripheral Count Pins Notes
ADC1 8 ch P40-P47 12-bit, channels IN5-IN12, ~1Kohm Z source
ADC2 8 ch P40-P47 (shared) 12-bit, ALT9 mux to same pins as ADC1
ACMP1 4 in P41, P42, P46, P47 IN0, IN3, IN1, IN5
ACMP2 4 in P41, P43, P46, P61 IN0, IN3, IN1, IN2
ACMP3 4 in P41, P44, P46 IN0, IN3, IN1
ACMP4 3 in P40, P41, P45, P46 IN2, IN0, IN3, IN1

Communication

Peripheral Pins (TX/RX/CTS/RTS) Header(s)
LPUART1 TX/RX on AD_B1 alt funcs; CTS/RTS via P61 J3
LPUART2 P42/P43 (TX/RX), P40/P41 (CTS/RTS) J2
LPUART3 P8/P7 (TX/RX), P6/P4 (CTS/RTS) – alt P46/P47 J1, J3
LPUART4 P56/P58 (TX/RX), P3/P2 (CTS/RTS) – alt P88/P87 J3, J1, J4
LPUART5 P86/P85 (TX/RX), P81/P82 (CTS/RTS) J4
LPUART6 P84/P83 (TX/RX), P78/P80 (CTS/RTS) J4
LPUART7 P77/P76 J4
LPUART8 P29/P28 (TX/RX), P25/P24 (CTS/RTS) – alt P70/P69 J2, J4
FLEXCAN1 P3/P2 (TX/RX) – also tied P89/P90 J1
FLEXCAN2 P12/P11 (TX/RX) J1
FLEXCAN3 P72/P71 (TX/RX) J4
LPI2C1 P40/P41 (SCL/SDA) J2
LPI2C3 P27/P26 or P47/P46 (SCL/SDA) J2, J3
LPI2C4 P9/P10 (SCL/SDA) J1
LPSPI1 P27/P25/P24/P26 (SCK/SDO/SDI/PCS0) – alt P82/P81/P80/P78 J2, J4
LPSPI2 P14/P16/P18/P15 (SCK/SDO/SDI/PCS0) J1
LPSPI4 P51/–/P50/P51 – uses B0/B1 alt funcs J3
USB OTG1 P35/P36/P37 (VBUS/D-/D+) J2 (dedicated)
USB OTG2 P32/P33/P34 (VBUS/D-/D+) J2 (dedicated)
SAI1 (I2S) TX_DATA/BCLK/SYNC + MCLK on B0/B1 pins (P50-P59) J3
SAI2 (I2S) TX_DATA/BCLK/SYNC + MCLK on EMC_04-07 (P19-P22) J1
SAI3 (I2S) TX_DATA/BCLK/SYNC + MCLK on EMC_36-38 (P70-P72) J4

SD Card (External)

Signal Pin RT1061 Pad
USDHC1_CMD P27 GPIO_SD_B0_00
USDHC1_CLK P26 GPIO_SD_B0_01
USDHC1_DATA0 P25 GPIO_SD_B0_02
USDHC1_DATA1 P24 GPIO_SD_B0_03
USDHC1_DATA2 P29 GPIO_SD_B0_04
USDHC1_DATA3 P28 GPIO_SD_B0_05

Ethernet

Interface Connection Pins
Ethernet 0 Integrated PHY on-module J3 P61–P66 (RJ45 differential pairs + LED signals; not GPIO)
Ethernet 1 RMII via external PHY EMC_19–25, AD_B1_04/05 (P44/P45 MDC/MDIO)
IEEE 1588 Via AD_B1 alt functions P40, P42, P43

Voltage Domains

Domain Voltage Pins
Main GPIO (EMC, AD_B1, B0/B1) 3.3V All user pins except USB
USB 5V VBUS sense P32 (OTG2), P35 (OTG1)
Reset (POR_B) 3.3V P23

Note: Unlike the MODRT1171, the SOMRT1061 has no LPSR (1.8V) GPIO domain. All user pins operate at 3.3V CMOS levels.

Common Code Patterns

GPIO: Blink an LED on Pin 78

#include <pins.h>
#include <pinconstant.h>
#include <nbrtos.h>
// P78 = GPIO_EMC_30, GPIO4_IO30 (Alt 5)
Pins[78].function(PIN_GPIO_OUT);
while (1) {
Pins[78] = 1; // Drive HIGH
OSTimeDly(TICKS_PER_SECOND);
Pins[78] = 0; // Drive LOW
OSTimeDly(TICKS_PER_SECOND);
}
TICKS_PER_SECOND
#define TICKS_PER_SECOND
System clock ticks per second.
Definition constants.h:49
PIN_GPIO_OUT
#define PIN_GPIO_OUT
Universal GPIO Output (any pin).
Definition MODM7AE70/include/pinconstant.h:22
OSTimeDly
void OSTimeDly(uint32_t to_count)
Delay the task until the specified value of the system timer ticks. The number of system ticks per se...
Definition nbrtos.h:1855

Read a GPIO Input on Pin 30

Pins[30].function(PIN_GPIO); // Set as input
Pins[30].PullUp(); // Optional: enable internal pull-up
int val = Pins[30]; // Read pin (0 or 1)
PIN_GPIO
#define PIN_GPIO
Universal GPIO Definition.
Definition MOD5441X/include/pinconstant.h:23

Open a Serial Port (LPUART3 on Pins 8/7)

#include <serial.h>
#include <pinconstant.h>
// Configure pins for LPUART3 (Serial Port 0)
Pins[8].function(PIN_08_LPUART3_TXD);
Pins[7].function(PIN_07_LPUART3_RXD);
int fd = SimpleOpenSerial(0, 115200); // Serial Port 0 = LPUART3
write(fd, "Hello\r\n", 7);
write
int write(int fd, const char *buf, int nbytes)
Write data to the stream associated with a file descriptor (fd). Can be used to write data to stdio,...
SimpleOpenSerial
#define SimpleOpenSerial(p, b)
Simple open a serial port.
Definition serial.h:229

Read ADC (Pin 41 = ADC1 IN6)

#include <pins.h>
Pins[41].readyAnalog(); // Configure pin for analog input
uint32_t raw = Pins[41].n(); // Raw 12-bit value (0-4095)
double voltage = Pins[41].v(); // Voltage relative to 3.3V reference

Watchdog (WDOG1)

#include "nbwatchdog.h" // helper from the Watchdog example
WatchdogEnable(4000); // reboot if not serviced within ~4 s
...
WatchdogService(); // call more often than the timeout

Arm the watchdog with a timeout, then service it regularly from healthy code. If the application hangs and stops servicing it, the module automatically reboots into a fresh copy of the application. Service from a dedicated task, not a blocking loop, and WatchdogEnable() keeps it serviced through a firmware update. The SOMRT1061 uses WDOG1; the other watchdog blocks (WDOG2 and RTWDOG) cannot be used. See Watchdog and the Watchdog section of SOMRT1061.

Physical Specifications

Parameter Value
Dimensions 1.50" x 2.65" (38.1mm x 67.3mm)
Weight 0.5 oz (14 grams)
Connectors 4x 22-pin, 0.1" (2.54mm) pitch
Temperature -40C to +85C operating
Humidity 5% to 90% non-condensing

Pin Index (Sorted by Function)

Pins Function
P1, P38, P49 Vcc 3.3V (DCDC_IN)
P5, P17, P39, P48, P60, P79 GND (VSS)
P23 Reset (POR_B)
P30 Wakeup / NMI
P31 PMIC_STBY_REQ
P32–P37 USB OTG1 / OTG2 (dedicated)
P40–P47 ADC / GPIO_AD_B1
P50–P59 LCD / SAI1 / GPIO_B0/B1
P61–P66 Ethernet 0 dedicated (J5 connector to PHY)
P2–P22 EMC port (SEMC, FLEXPWM, LPUART3/4, FLEXCAN1/2)
P24–P29 SD_B0 (USDHC1, LPUART8)
P67–P88 EMC port (SEMC, LPUART5/6/7/8, ENET1, FLEXCAN3)