NetBurner 3.5.0
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SOMRT1061 Platform Reference

Introduction

This document provides the memory map and locations of reference materials for those who wish to add additional hardware to their NetBurner device.

Datasheet

The datasheet for the SOMRT1061 module includes information on connectors, signal names, and operational parameters. It is located on the SOMRT1061 product page: SOMRT1061 Product Page.

Development Board Schematic

The DEV-SOMRT1061 development board schematic is located in the <nburn_install>\docs\NetBurner\platform\Schematics directory. This schematic can be used for design ideas in your own hardware implementation for power, RS-232, RS-485, and SD Flash card implementation.

SOMRT1061 Platform General Information

The SOMRT1061 uses the NXP i.MX RT1061 microcontroller. The reference manual and datasheet provide in-depth information on the processor, including register settings, bus configuration and timing information. The reference manual is located in the <nburn_install>\docs\NXP directory of your NetBurner installation.

  • i.MX RT1061 running at 528MHz (ind temp)
  • 8MB SPI Flash (stores compressed application image)
  • 32MB PSRAM
  • 1MB onboard SRAM:
    • 128k ITCM single cycle instruction fetch memory,
    • 128K DTCM single cycle data fetch memory
    • 768k general purpose fast SRAM


The 8MB of Flash uses a Flash File System and is used for all storage purposes:

  • Sectors are 8k
  • The standard NetBurner configuration, certificate and user flash operate transparently through the file system.
  • First sector reserved for file partition table. Note: If you need direct flash access, please contact NetBurner support.
  • You can add a secondary Flash File System as demonstrated in the EFFS-STD examples. Multiple partitions are supported. Please refer to the documentation and examples, such as the EFFS-STD multiple partition (multi-part) example.
  • Application space varies by use case, but is typically 7.5MB for the compressed application. Items that can reduce the 8MB total space include: file system overhead, certificates, configuration data, secondary file system.


External Memory Bus

  • Chip selects configurable anywhere in the external bus range

Boot Sequence

At power-up or reset, the application is decompressed from Flash memory to PSRAM, verified by checksum, and execution begins. If the checksum fails or the application crashes, the device will reboot to the Configuration Server to facilitate a recovery by downloading a new application.

If the application causes an issue in which continuous traps occur, or the state of the system is such the Configuration Server cannot run, a recovery hardware jumper procedure can be used to reset the device.

Note
It is always a good idea to have a serial port terminal connected to the boot/debug serial port to view status messages, or use the 'A' to abort the boot sequence command when prompted to abort application execution and boot to the Configuration Server.