10#ifndef _COLDFIRE_INTERRUPT_H
11#define _COLDFIRE_INTERRUPT_H
363#define INTERRUPT(x, y) \
371 __asm__(".global " #x); \
373 __asm__("move.w #0x2700,%sr "); \
374 __asm__("lea -60(%a7),%a7 "); \
375 __asm__("movem.l %d0-%d7/%a0-%a6,(%a7) "); \
376 __asm__("move.l (OSISRLevel32),%d0 "); \
377 __asm__("move.l %d0,-(%sp) "); \
378 __asm__("move.l (OSIntNesting),%d0"); \
379 __asm__("addq.l #1,%d0"); \
380 __asm__("move.l %d0,(OSIntNesting)"); \
381 __asm__("move.l #" #y ",%d0 "); \
382 __asm__("move.w %d0,%sr "); \
383 __asm__("move.l %d0,(OSISRLevel32)"); \
384 __asm__("jsr real_" #x); \
385 __asm__("move.l (%sp)+,%d0 "); \
386 __asm__("move.l %d0,(OSISRLevel32)"); \
387 __asm__(" jsr OSIntExit "); \
388 __asm__("movem.l (%a7),%d0-%d7/%a0-%a6 "); \
389 __asm__("lea 60(%a7),%a7 "); \
396 #error NBRTOS must be included
403 #define INTERRUPT(x, y) \
407 __asm__(".global " #x); \
409 __asm__("move.w #0x2700,%sr "); \
410 __asm__("lea -60(%a7),%a7 "); \
411 __asm__("movem.l %d0-%d7/%a0-%a6,(%a7) "); \
412 __asm__("move.l (OSISRLevel32),%d0 "); \
413 __asm__("move.l %d0,-(%sp) "); \
414 __asm__("move.l (OSIntNesting),%d0"); \
415 __asm__("addq.l #1,%d0"); \
416 __asm__("move.l %d0,(OSIntNesting)"); \
417 __asm__("move.l #" #y ",%d0 "); \
418 __asm__("move.w %d0,%sr "); \
419 __asm__("move.l %d0,(OSISRLevel32)"); \
420 __asm__("jsr real_" #x); \
421 __asm__("move.l (%sp)+,%d0 "); \
422 __asm__("move.l %d0,(OSISRLevel32)"); \
423 __asm__(" jsr OSIntExit "); \
424 __asm__("movem.l (%a7),%d0-%d7/%a0-%a6 "); \
425 __asm__("lea 60(%a7),%a7 "); \
430 #error NBRTOS must be included
563#define CF_ACCESSERROR_VECTOR 2
580#define CF_ADDRESSERROR_VECTOR 3
597#define CF_ILLEGAL_INSTRUCTION_VECTOR 4
613#define CF_PRIVLEDGE_VIOLATION_VECTOR 8
624#define CF_TRACE_VECTOR 9
635#define CF_UNIMPLMENTED_A_VECTOR 10
645#define CF_UNIMPLMENTED_F_VECTOR 11
656#define CF_DEBUG_INTERRUPT 12
669#define CF_FORMAT_ERR_VECTOR 14
683#define CF_UNINITIALIZED_VECTOR 15
733#define CF_SPURIOUS_INT_VECTOR 24
745#define CF_AUTOVECTOR_IRQ1 25
752#define CF_AUTOVECTOR_IRQ2 26
759#define CF_AUTOVECTOR_IRQ3 27
766#define CF_AUTOVECTOR_IRQ4 28
773#define CF_AUTOVECTOR_IRQ5 29
780#define CF_AUTOVECTOR_IRQ6 30
793#define CF_AUTOVECTOR_IRQ7 31
838#define CF_TRAP0_VECTOR 32
845#define CF_TRAP1_VECTOR 33
852#define CF_TRAP2_VECTOR 34
859#define CF_TRAP3_VECTOR 35
866#define CF_TRAP4_VECTOR 36
873#define CF_TRAP5_VECTOR 37
880#define CF_TRAP6_VECTOR 38
887#define CF_TRAP7_VECTOR 39
894#define CF_TRAP8_VECTOR 40
901#define CF_TRAP9_VECTOR 41
908#define CF_TRAP10_VECTOR 42
915#define CF_TRAP11_VECTOR 43
922#define CF_TRAP12_VECTOR 44
929#define CF_TRAP13_VECTOR 45
936#define CF_TRAP14_VECTOR 46
943#define CF_TRAP15_VECTOR 47
1130#define CF_USER_BASE_VECTOR 64
void SetSR_IntLevel(uint16_t sv)
Set the interrupt mask level in the Status Register (SR).
uint16_t GetSR_IntLevel()
Get the current interrupt mask level from the Status Register (SR).