Minimum Connections for Operation
The following signals must be connected for the module to boot and run:
- Power (3.3V, connect ALL) – Minimum rise time: 2.4V/ms
- P1-48 Vcc – 3.3VDC supply (1A minimum)
- P2-2 Vcc – 3.3VDC supply
- P2-50 Vcc – 3.3VDC supply
- SNVS Power – MUST power on BEFORE or WITH 3.3V supply
- P1-3 Vstby (VDD_SNVS_IN) – See power sequencing below
- Ground (connect ALL)
- P1-1, P1-2, P1-49, P1-50
- P2-1, P2-49
| Signal | Pins | Why Required |
| Vcc 3.3V | P1-48, P2-2, P2-50 | Powers all on-module logic, memory, and Ethernet switch |
| Vstby (VDD_SNVS_IN) | P1-3 | SNVS module power – powers RTC and security options (see below) |
| GND | P1-1,2,49,50 and P2-1,49 | Return path; connect all for low impedance |
SNVS Power (P1-3 / VDD_SNVS_IN) – REQUIRED
P1-3 powers the Secure Non-Volatile Storage (SNVS) module, which controls the RTC, security options, and power-on-reset logic. This pin must always be connected.
- Option A – No battery backup (typical): Tie P1-3 directly to the 3.3V supply (short to P1-48 / P2-2 / P2-50). SNVS powers up simultaneously with the main supply. RTC state is lost when power is removed.
- Option B – Battery backup (coin cell): Connect a coin cell (e.g., CR2032) to P1-3 for RTC and secure key retention during power loss. The coin cell must be connected before any other supply is switched on.
Power Sequencing
| Rule | Requirement |
| Rise Time | 3.3V supply must reach operating voltage at a minimum rate of 2.4V/ms |
| Power Up | VDD_SNVS_IN (P1-3) must be stable before or at the same time as the 3.3V supply. If using a coin cell, it must be connected before any other supply is switched on. |
| Power Down | VDD_SNVS_IN (P1-3) must be turned off after the 3.3V supply, or remain connected (coin cell) to retain RTC/security state |
| POR_B | Hold reset low during the entire power-up sequence (handled by on-module reset IC) |
| DCDC_PSWITCH | When internal DCDC is enabled, an external delay circuit is required to delay the DCDC_PSWITCH signal at least 1ms after DCDC_IN is stable (handled on-module) |
- Warning
- Leaving P1-3 (VDD_SNVS_IN) unconnected will cause unpredictable boot behavior. The simplest approach is to tie it directly to 3.3V.
Optional but recommended for most designs:
| Signal | Pins | When Needed |
| RSTI/POR | P1-28 | External reset button (has on-module POR; tie to GND through button) |
| USB1 | P2-14,15,16 | USB OTG1 (VBUS 5V, D-, D+) |
| UART (debug) | P1-4, P1-20 | LPUART7 TX/RX for serial console |
- Note
- Simplest possible carrier board: Connect 3.3V power, ground, and tie P1-3 (Vstby) to 3.3V. The module will boot, initialize both Ethernet ports, and be accessible over the network with no other connections.
Connector Pinout
Two 50-pin 0.1 in (2.54mm) dual-row headers. Pin 1 at top-left of each header.
Header P1 (Left):
| Odd Signal | Odd# | Even# | Even Signal | Alternate Functions |
| GND | 1 | 2 | GND | |
| Vstby | 3 | 4 | AD_00 | ADC/ACMP1_IN1/GPIO/UART7_TX |
| SD_B2_3 | 5 | 6 | SD_B2_5 | USDHC2 (on-module, reserved) |
| SD_B2_4 | 7 | 8 | SD_B2_2 | USDHC2 (on-module, reserved) |
| SD_B2_1 | 9 | 10 | SD_B2_0 | USDHC2 (on-module, reserved) |
| AD_32 | 11 | 12 | AD_09 | ACMP4_IN1/ADC1_CH1B |
| AD_33 | 13 | 14 | AD_11 | ACMP4_IN2/ADC1_CH2B |
| AD_10 | 15 | 16 | AD_13 | ADC1_CH2A/ADC1_CH3B |
| AD_12 | 17 | 18 | AD_15 | ADC1_CH3A/ADC1_CH4B |
| AD_14 | 19 | 20 | AD_01 | ADC1_CH4A/ACMP1_IN2 |
| AD_16 | 21 | 22 | AD_03 | ADC1_CH5A/ACMP1_IN4 |
| AD_02 | 23 | 24 | AD_05 | ACMP1_IN3/ACMP2_IN2 |
| AD_04 | 25 | 26 | AD_07 | ACMP2_IN1/ADC1_CH_B0 |
| AD_06 | 27 | 28 | RSTI/POR | ADC1_CH_A0/Reset Input |
| AD_08 | 29 | 30 | AD_29 | ADC1_CH_A1/ACMP3_IN2 |
| EMC_B2 | 31 | 32 | LPSR_08 | SEMC/LPSR GPIO |
| LPSR_09 | 33 | 34 | LPSR_10 | LPSR GPIO |
| LPSR_11 | 35 | 36 | LPSR_12 | LPSR GPIO |
| LPSR_13 | 37 | 38 | LPSR_14 | LPSR GPIO |
| LPSR_15 | 39 | 40 | LPSR_00 | LPSR GPIO |
| LPSR_01 | 41 | 42 | LPSR_02 | LPSR GPIO |
| LPSR_03 | 43 | 44 | LPSR_04 | LPSR GPIO |
| LPSR_05 | 45 | 46 | LPSR_06 | LPSR GPIO |
| LPSR_07 | 47 | 48 | Vcc 3.3V | |
| GND | 49 | 50 | GND | |
Header P2 (Right):
| Odd Signal | Odd# | Even# | Even Signal | Alternate Functions |
| GND | 1 | 2 | Vcc 3.3V | |
| AD_25 | 3 | 4 | AD_24 | ADC2_B6/ADC2_A6 |
| AD_34 | 5 | 6 | AD_17 | ACMP4_IN3/ADC1+2_CH5B |
| AD_18 | 7 | 8 | AD_19 | ADC2_A0/ADC2_B0 |
| DAC_OUT | 9 | 10 | AD_20 | Buffered DAC/ADC2_A1 |
| AD_21 | 11 | 12 | AD_22 | ADC2_B1/ADC2_A2 |
| AD_23 | 13 | 14 | USB1.VBUS_5V | ADC2_B2/USB1 Power |
| USB1.DN | 15 | 16 | USB1.D_P | USB OTG1 Data |
| USB2.DN | 17 | 18 | USB2.D_P | USB OTG2 Data |
| USB2.5V | 19 | 20 | AD_28 | USB2 Power/ACMP3_IN1 |
| DISP_11 | 21 | 22 | DISP_10 | Display / LPUART2 |
| DISP_13 | 23 | 24 | DISP_12 | Display / CAN1 |
| SD_B1_1 | 25 | 26 | AD_30 | USDHC1 CLK/ACMP3_IN3 |
| SD_B1_0 | 27 | 28 | SD_B1_2 | USDHC1 CMD/DATA0 |
| AD_26 | 29 | 30 | SD_B1_5 | ACMP2_IN3/USDHC1 DATA3 |
| AD_31 | 31 | 32 | SD_B1_4 | ACMP3_IN4/USDHC1 DATA2 |
| SD_B1_3 | 33 | 34 | DISP_B2_1 | USDHC1 DATA1/Display |
| DISP_09 | 35 | 36 | DISP_05 | Display / 100M Ethernet |
| DISP_03 | 37 | 38 | AD_27 | Display/ACMP2_IN4 |
| DISP_06 | 39 | 40 | DISP_04 | Display / 100M Ethernet |
| DISP_02 | 41 | 42 | DISP_07 | Display / 100M Ethernet |
| DISP_15 | 43 | 44 | DISP_00 | Display / CAN1 |
| DISP_08 | 45 | 46 | DISP_14 | Display / 100M Ethernet |
| EMC_39 | 47 | 48 | EMC_40 | SEMC / LPUART6 |
| GND | 49 | 50 | Vcc 3.3V | |
Power
| Parameter | Value |
| Main supply (Vcc) | 3.3VDC on P1-48, P2-2, P2-50 |
| SNVS standby (Vstby) | P1-3, for RTC/tamper detect |
| USB VBUS | 5V on P2-14 (USB1), P2-19 (USB2) |
| Ground | P1-1,2,49,50 and P2-1,49 |
Current Draw at 3.3V:
| Configuration | Current |
| No Ethernet | 410 mA |
| 1x 100 Mbps Ethernet | 457 mA |
| 2x 100 Mbps Ethernet | 520 mA |
| 1x 1 Gbps Ethernet | 520 mA |
| 2x 1 Gbps Ethernet | 790 mA |
Peripheral Availability Summary
Analog
| Peripheral | Count | Header Pins | Notes |
| ADC1 (12-bit) | 10 ch | P1: 4,12,14-19,26-27,29 | Pairs: A0-A1,B0, CH1-5 A/B |
| ADC2 (12-bit) | 8 ch | P2: 3-4,7-8,10-13 | CH0-2 A/B, CH5B, CH6 A/B |
| DAC (12-bit) | 1 out | P2: 9 | Buffered via NCS20166, 1.65V ref |
| ACMP1 | 4 in | P1: 4,20,22-23 | IN1-IN4 |
| ACMP2 | 4 in | P1: 24-25, P2: 29,38 | IN1-IN4 |
| ACMP3 | 4 in | P1: 30, P2: 20,26,31 | IN1-IN4 |
| ACMP4 | 3 in | P1: 11,13, P2: 5 | IN1-IN3 |
- Note
- The ADC operates in High range mode by default, which uses an internal resistive divider to accept inputs up to 3.3V at slightly reduced ENOB. Low range mode removes the divider for best precision but limits inputs to ~1.65V; exceeding this in Low range may damage the ADC. Use High range whenever driving ADC pins from 3.3V logic.
Communication
| Peripheral | Pins | Header Locations |
| LPUART1 | TX/RX/CTS/RTS | P2: 4,3,29,38 |
| LPUART2 | TX/RX/CTS/RTS | P2: 22,21,24,23 (on DISP_B2 pins) |
| LPUART3 | TX/RX | P2: 26,31 (on AD_30/31) |
| LPUART5 | TX/RX | P2: 20, P1: 30 (on AD_28/29) |
| LPUART7 | TX/RX/CTS/RTS | P1: 4,20,23,22 (on AD_00-03) |
| LPUART8 | TX/RX/CTS/RTS | P1: 23,22,25,24 (on AD_02-05) |
| LPUART9 | TX/RX/CTS/RTS | P1: 10,9,8,5 (on SD_B2 pins) |
| LPUART10 | TX/RX | P1: 11,13 (on AD_32/33) |
| LPUART11 | TX/RX/CTS/RTS | P1: 32-35 (on LPSR_8-11) |
| LPUART12 | TX/RX/CTS/RTS | P1: 40-41,44-45,46,47 (on LPSR pins) |
| FLEXCAN1 | TX/RX | P1: 27,26 (on AD_06/07) |
| FLEXCAN2 | TX/RX | P1: 4,20 (on AD_00/01) or P2: 26,31 |
| FLEXCAN3 | TX/RX | P1: 40,41 or 32,33 or 46,47 (LPSR pins) |
| LPI2C1 | SCL/SDA | P1: 11,13 or 12,26 (on AD pins) |
| LPI2C2 | SCL/SDA | P2: 7,8 (on AD_18/19) |
| LPI2C3 | SCL/SDA | P2: 22,21 (on DISP_B2_10/11) |
| LPI2C4 | SCL/SDA | P2: 4,3 or 24,23 (on AD/DISP pins) |
| LPI2C5 | SCL/SDA | P1: 45,44 (on LPSR_05/04) |
| LPI2C6 | SCL/SDA | P1: 47,46 (on LPSR_07/06) |
| LPSPI1 | SCK/SDO/SDI/PCS0 | P2: 20,26,31,P1:30 (on AD pins) |
| LPSPI2 | SCK/SDO/SDI/PCS0 | P2: 4,29,38,3 (on AD pins) |
| LPSPI4 | SIN/SOUT/SCK/PCS | P1: 5,8,10,9 (on SD_B2 pins) |
| LPSPI5 | SCK/SDO/SDI/PCS0 | P1: 42,44,45,43 (LPSR_02-05) |
| LPSPI6 | SCK/SDO/SDI/PCS0-1 | P1: 34,35,36,33,32 (LPSR_10-12,09,08) |
| USB OTG1 | VBUS/D-/D+ | P2: 14,15,16 (dedicated, 5V) |
| USB OTG2 | VBUS/D-/D+ | P2: 19,17,18 (dedicated, 5V) |
| SAI1 (I2S) | MCLK/BCLK/SYNC/DATA | P2: 6,7 + various DISP_B2 pins |
| SAI4 (I2S) | MCLK/BCLK/SYNC/DATA | P1: 40-47 (LPSR pins) |
SD Card (External)
| Signal | Pin | Header |
| USDHC1_CMD | SD_B1_0 | P2-27 |
| USDHC1_CLK | SD_B1_1 | P2-25 |
| USDHC1_DATA0 | SD_B1_2 | P2-28 |
| USDHC1_DATA1 | SD_B1_3 | P2-33 |
| USDHC1_DATA2 | SD_B1_4 | P2-32 |
| USDHC1_DATA3 | SD_B1_5 | P2-30 |
- Note
- USDHC2 (P1 pins 5-10, SD_B2) is used for on-module flash storage and is NOT available for external SD cards.
Ethernet
| Interface | Connection | Pins on Headers |
| 2x 1 Gbps Ethernet | On-module RJ-45 connectors | Not on headers |
| 10/100 Ethernet (3rd) | Via DISP_B2 alt functions | P2: 21-24, 34-46 |
| IEEE 1588 Timestamps | Via AD pin alt functions | P1/P2 AD pins |
Voltage Domains
| Domain | Voltage | Pins |
| Main GPIO (AD, SD_B, EMC, DISP) | 3.3V | P1: 4-31, P2: 3-13, 20-48 |
| LPSR GPIO | 3.3V | P1: 32-47 (LPSR_0 through LPSR_15) |
| USB | 5V | P2: 14, 19 (VBUS only) |
| SNVS Standby | Per application | P1: 3 |
| VCC_SDIO (connected to SD_B1_xx) | 1.8V or 3.3V | Configurable |
- Note
- The DAC Out is driven by a rail-to-rail op amp from 3.3V and is 2x buffered from a 1.65V reference (rev 1.6 onward).
Common Code Patterns
GPIO: Blink an LED on P1 Pin 4
#include <pin_irq.h>
#include <pins.h>
#include <pinconstant.h>
Pins[4].function(PINP1_4_GPIO8_IO31);
while (1) {
Pins[4].drive(1);
OSTimeDly(TICKS_PER_SECOND);
Pins[4].drive(0);
OSTimeDly(TICKS_PER_SECOND);
}
Read a GPIO Input on P2 Pin 10
Pins[59].function(PINP2_10_GPIO9_IO19);
Pins[59].hiz();
int val = Pins[59].read();
Open a Serial Port (LPUART7 on P1 pins 4/20)
#include <serial.h>
#include <pinconstant.h>
Pins[4].function(PINP1_4_LPUART7_TXD);
Pins[20].function(PINP1_20_LPUART7_RXD);
int fd = SerialOpen(SER_PORT7, 115200, 8, eParityNone, 1);
write(fd, "Hello\r\n", 7);
Read ADC (AD_06 = ADC1 Channel A0, P1 Pin 27)
#include <adcRT1170.h>
uint16_t raw = ReadADC1(ADC1_A0);
float voltage = (raw / 4095.0f) * 1.65f;
Physical Specifications
| Parameter | Value |
| Dimensions | 2.95" x 2.00" (74.9mm x 51mm) |
| Weight | 1 oz (28 grams) |
| Mounting Holes | 1x 0.125" (3.18mm) dia |
| Connectors | 2x 50-pin, 0.1" (2.54mm) pitch |
| Temperature | -40C to +85C operating |
| Humidity | 5% to 90% non-condensing |
Pin Index (Sorted by Function)
P1
| Pins | Function |
| 1-2 | GND |
| 3 | Vstby |
| 4-27 | Analog/GPIO (AD pins) |
| 28 | Reset |
| 29-30 | Analog/GPIO |
| 31 | SEMC |
| 32-47 | LPSR GPIO |
| 48 | Vcc |
| 49-50 | GND |
P2
| Pins | Function |
| 1 | GND |
| 2 | Vcc |
| 3-13 | Analog/GPIO (AD pins) |
| 14-19 | USB |
| 20 | Analog/GPIO |
| 21-24 | Display/GPIO |
| 25,27-28,30,32-33 | SD Card |
| 26,29,31,38 | Analog/GPIO |
| 34-37,39-46 | Display/GPIO |
| 47-48 | SEMC |
| 49 | GND |
| 50 | Vcc |