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SSC_rxtx_cfg_t Struct Reference

Configuration structure for a given direction (rx or tx) of the SSC module. Passed to the initialize function to configure the hardware. More...

#include <ssc_i2s.h>

Public Attributes

bool enable {false}
 
uint8_t period {64}
 
uint8_t startDly {1}
 
startCond_t startCond {START_FRAME_EDGE}
 
clkGate_t clkGate {CLK_GATE_CONTINUOUS}
 
dataValid_t dataValid {DATA_VALID_RISING}
 
clkOut_t clkOut {CLK_OUT_INPUT}
 
clkSrc_t clkSrc {CLK_SRC_RK}
 
uint8_t syncLen {0}
 
frameEdge_t syncEdge {FRAME_SYNC_FALLING}
 
bool syncDataEnabled {false}
 
frameSyncOut_t syncOut {FRAME_SYNC_INPUT}
 
uint8_t wordsPerFrame {1}
 
bitOrder_t bitOrder {MOST_SIG_FIRST}
 
bool lineIdleState {1}
 
uint8_t bitsPerWord {24}
 
bufferDepletionBehavior_t depletionBehavior {DEPLETED_PAUSE}
 

Detailed Description

Configuration structure for a given direction (rx or tx) of the SSC module. Passed to the initialize function to configure the hardware.

Member Data Documentation

◆ bitOrder

bitOrder_t SSC_rxtx_cfg_t::bitOrder {MOST_SIG_FIRST}

The bit order of transitions.

◆ bitsPerWord

uint8_t SSC_rxtx_cfg_t::bitsPerWord {24}

The bit width of words to be transferred.

◆ clkGate

clkGate_t SSC_rxtx_cfg_t::clkGate {CLK_GATE_CONTINUOUS}

The clock gating condition for this channel.

◆ clkOut

clkOut_t SSC_rxtx_cfg_t::clkOut {CLK_OUT_INPUT}

The clock out condition for this channel.

◆ clkSrc

clkSrc_t SSC_rxtx_cfg_t::clkSrc {CLK_SRC_RK}

The clock source for this channel.

◆ dataValid

dataValid_t SSC_rxtx_cfg_t::dataValid {DATA_VALID_RISING}

The data valid condition for this channel.

◆ depletionBehavior

bufferDepletionBehavior_t SSC_rxtx_cfg_t::depletionBehavior {DEPLETED_PAUSE}

The depletion behavior that should be used for driver DMA transfers.

◆ enable

bool SSC_rxtx_cfg_t::enable {false}

Whether this direction should be enabled.

◆ lineIdleState

bool SSC_rxtx_cfg_t::lineIdleState {1}

The state the line should be driven to when not transmitting a word.

◆ period

uint8_t SSC_rxtx_cfg_t::period {64}

The period of each frame, in terms of the bit clock.

◆ startCond

startCond_t SSC_rxtx_cfg_t::startCond {START_FRAME_EDGE}

The starting condition for this channel.

◆ startDly

uint8_t SSC_rxtx_cfg_t::startDly {1}

How many bit periods should data be delayed by at the start of the frame.

◆ syncDataEnabled

bool SSC_rxtx_cfg_t::syncDataEnabled {false}

Whether synchronizing data is used.

◆ syncEdge

frameEdge_t SSC_rxtx_cfg_t::syncEdge {FRAME_SYNC_FALLING}

The frame sync edge defining frame start.

◆ syncLen

uint8_t SSC_rxtx_cfg_t::syncLen {0}

The bit length of the synchronization data (when used).

◆ syncOut

frameSyncOut_t SSC_rxtx_cfg_t::syncOut {FRAME_SYNC_INPUT}

The frame sync output configuration.

◆ wordsPerFrame

uint8_t SSC_rxtx_cfg_t::wordsPerFrame {1}

Number of words contained in a frame.


The documentation for this struct was generated from the following file: