25#define QSPI_INTERRUPT_SOURCE (18)
28#define QSPI_INTERRUPT_LEVEL (2)
31#define QSPI_INTERRUPT_PRIORITY (7)
36#define QSPI_RAM_ENTRIES (16)
37#define QSPI_RAM_TRANSMIT_START (0x00)
38#define QSPI_RAM_RECEIVE_START (0x10)
39#define QSPI_RAM_COMMAND_START (0x20)
58typedef struct _QmrFields
67} __attribute__((packed)) QmrFields;
74} __attribute__((packed)) Qmr;
83typedef struct _QdlyrFields
89} __attribute__((packed)) QdlyrFields;
96} __attribute__((packed)) Qdlyr;
109typedef struct _QwrFields
119} __attribute__((packed)) QwrFields;
126} __attribute__((packed)) Qwr;
141typedef struct _QirFields
151 uint16_t mbz_04_07 : 4;
157} __attribute__((packed)) QirFields;
164} __attribute__((packed)) Qir;
175typedef struct _QcrFields
181 uint16_t qspi_cs : 4;
182 uint16_t mbz_00_07 : 8;
184} __attribute__((packed)) QcrFields;
191} __attribute__((packed)) Qcr;
217typedef void(QspiIsr)(void);
236int QspiSetupHardware(BOOL setHighDrive);
257int QspiAttachChipSelects(uint8_t controlledChipSelects);
278int QspiDetachChipSelects(uint8_t controlledChipSelects);
300void QspiAssertChipSelects(uint8_t controlledChipSelects, BOOL isChipSelectActiveLow);
322void QspiDeassertChipSelects(uint8_t controlledChipSelects, BOOL isChipSelectActiveLow);
340void QspiSetupIsr(QspiIsr isr);
358uint8_t QspiGetBaudSetting(
unsigned long baudRateInMhz);
376unsigned long QspiGetCurrentBaudSetting(
void);
394void QspiEnableIsr(
void);
412void QspiDisableIsr(
void);
430void QspiGetRegisters(
volatile uint16_t **qmrPtr,
431 volatile uint16_t **qdlyrPtr,
432 volatile uint16_t **qwrPtr,
433 volatile uint16_t **qirPtr,
434 volatile uint16_t **qarPtr,
435 volatile uint16_t **qdrPtr);