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NetBurner 3.3.9
PDF Version |
This document provides the memory map and locations of reference materials for those who wish to add additional hardware to their NetBurner device.
The NANO54415 uses the NXP MCF54415 microprocessor. The reference manual and datasheet provide in-depth information on the microprocessor, including register settings, bus configuration and timing information. It is located in the <nburn_install>\docs\NXP
directory of your NetBurner installation.
The datasheet for the NANO54415 module includes information on connectors, signal names, and operational parameters. It is located on the NANO54415 product page: NANO54415 Datasheet.
The NANO54415 development board schematic is located in the <nburn_install>\docs\NetBurner\Platform\Schematics
directory. This schematic can be used for design ideas in your own hardware implementation for power, RS-232, RS-485, and SD Flash card implementation.
The NANO54415 uses 4 types of memory:
The Boot Monitor executes at power-up and attempts to decompress the application into DDR2 RAM and begin execution. If the application is corrupted or does not exist, it will attempt to run the Alternate Boot Monitor. If the Alternate Boot Monitor cannot be run, the system will remain in the Boot Monitor. The Alternate Boot Monitor provides network communication to enable an application download, and is the normal recovery method should unrecoverable application errors occur. The Boot Monitor only provides serial communication.
4MB SPI Boot Flash | 8MB SPI Flash | 64MB DDR2 RAM |
---|---|---|
Boot Monitor | 2.x System Configuration | Application (decompressed) |
Alternate Boot Monitor | User Parameters | System Stack |
Application (compressed) | ||
3.x System Configuration |
The runtime memory map for the location of the microprocessors onboard SRAM and DDR2 RAM is shown below:
Memory Region | Address Range | Description |
---|---|---|
Undefined | 0x00000000 to 0x01FFFFFF | Undefined area to detect null pointers |
DDR2 RAM | 0x40000000 to 0x43FFFFFF | 64MB of DDR2 RAM |
VBR | 0x40000000 to 0x400003FF | 1kB Processor Vector Base Register |
RAMBAR | 0x80000000 to 0x8000FFFF | 64kB Processor internal SRAM |
IPSBAR | 0xE0000000 to 0xFFFFFFFF | Processor internal device registers |
There is a total of 8MB SPI Flash memory used to store the compressed application and non-volatile parameters. Read/write operations are only accessible through system API functions. The memory does not appear in the microprocessor's address map.
SPI Address | Description |
---|---|
0x000000 | 8kB 2.x System Configuration Record storage |
0x002000 | 8kB User Parameter Storage |
0x004000 | 7.9MB Compressed Application Code |
0x7EE000 | 8kB 3.x Reserved System Configuration Storage |
0x7F0000 | 64kB 3.x System Configuration |