i2c_class.h

/*NB_REVISION*/
 
/*NB_COPYRIGHT*/
 
#ifndef _I2C_CLASS_H
#define _I2C_CLASS_H
#include <basictypes.h>
#include <nbrtos.h>
#include <sim.h>
 
/* defined I2C Timeout values will be used if user does not include the 'ticks_to_wait'
   parameter when calling I2C functions                                                  */
#define I2C_RX_TX_TIMEOUT (5)    // Ticks allowed before timeout of a single byte transmission
#define I2C_START_TIMEOUT (20)   // Ticks allowed before timeout when attempting start on I2C bus
 
#define NUM_I2C_MODULES (6)
 
enum e_i2cstatus
{
    OKAY = 0,
    NEXT_WRITE_OK,
    NEXT_READ_OK,
    MASTER_OK,
    TIMEOUT,
    BUS_NOT_AVAIL,
    NOT_READY,
    LOST_ARB,
    LOST_ARB_ADD,
    NO_LINK_RX_ACK
};
 
// //Struct that contains I2C Slave I/O Buffers
// struct I2C_Slave_Record
// {
// OS_SEM I2C_Slave_RX_Semaphore;  //semaphore used to determine when a slave RX interrupt occurs
 
// volatile uint8_t * pI2CRxbuf;
// volatile uint8_t * pI2CTxbuf;
 
// volatile uint32_t I2Crx_put;
// volatile uint32_t I2Crx_get;
 
// volatile uint32_t I2Ctx_put;
// volatile uint32_t I2Ctx_get;
// };
 
class i2c_master
{
   private:
    volatile i2cstruct *i2cRegs;
 
   protected:
    inline bool busBusy() { return (0x20 & i2cRegs->i2sr) == 0x20; };
    inline bool slaveMode() { return (0x20 & i2cRegs->i2cr) == 0x00; };
    inline bool arbLost() { return (0x10 & i2cRegs->i2sr) == 0x10; };
    inline bool addressedAsSlave() { return (0x40 & i2cRegs->i2sr) == 0x40; };
    inline bool addressedSlaveTX() { return (0x04 & i2cRegs->i2sr) == 0x04; };
    inline bool transmitting() { return (0x10 & i2cRegs->i2cr) == 0x10; };
    inline bool receivedRXAck() { return (0x01 & i2cRegs->i2sr) == 0x00; };
    inline bool sentRXAck() { return (0x08 & i2cRegs->i2cr) == 0x00; };
    inline void setAck() { i2cRegs->i2cr &= 0xF7; };
    inline void setRX() { i2cRegs->i2cr &= 0xEF; };
    inline void setRepeatStart() { i2cRegs->i2cr |= 0x04; };
    inline void clrArbLost() { i2cRegs->i2sr &= 0xEF; };
    inline void clrIntFlag() { i2cRegs->i2sr &= 0xFD; };
    inline void sendStop() { i2cRegs->i2cr &= 0xDF; }
 
    inline void sendData(uint8_t data) { i2cRegs->i2dr = data; };
    inline void setFreq(uint8_t freq) { i2cRegs->i2fdr = freq; }
 
   public:
    inline void setTX() { i2cRegs->i2cr |= 0x10; };
    inline void setNoAck() { i2cRegs->i2cr |= 0x08; };
    inline uint8_t readData() { return i2cRegs->i2dr; };
    void isr();
    OS_SEM I2C_Semaphore;   // semaphore for when interrupt occurs
    volatile e_i2cstatus status;
    i2c_master();
    void init(uint8_t moduleNum, uint8_t freqdiv);
    void stop(uint32_t ticks_to_wait);
    void disable();
    void reset();
    void read8(uint8_t *val, uint32_t ticks_to_wait);
    void write8(uint8_t, uint32_t);
    void start(uint8_t, bool, uint32_t);
    void restart(uint8_t, bool, uint32_t);
    volatile bool bLastTX;      // boolean to tell when we have completed a master-TX
    volatile uint8_t RnW;       // 2 = Last TX was not address, 1 = RX request, 0 = TX request
    volatile bool bRestarted;   // Used in buf RX, TX functions to identify if we restarted
};
 
extern i2c_master I2C[NUM_I2C_MODULES];
// i2c_master I2C0(0, 0x3C);
 
#endif