NetBurner 3.5.6
PDF Version
Digital to Analog (DAC)

DAC - Digital to Analog Converter Example

Overview

This NetBurner application demonstrates the use of the integrated Digital-to-Analog Converter (DAC) on MCF5441X-based platforms. The application provides two operating modes: manual DAC output control and automatic waveform generation using DMA timer triggering.

Supported Platforms

  • MOD5441X - DAC0 output on J2.9, Timer0 output on J2.36
  • NANO54415 - DAC0 output on J2.9, Timer0 output on Pin 19

Hardware Requirements

  • NetBurner module with DAC capability
  • CRITICAL: Analog reference voltage connection required
  • Oscilloscope or voltmeter for output monitoring
  • Optional: Load resistor for current measurement

Analog Reference Voltage Setup

MOD5441X Platforms:**

  • Connect J2.2 (Vcc/3.3V) to J2.5 (Analog Reference Input)

  • This provides 3.3V reference for full-scale DAC output

    NANO54415 Platforms:**

  • Connect P3.2 (Vcc/3.3V) to P2.8 (Analog Reference Input)
  • This provides 3.3V reference for full-scale DAC output

‍WARNING: The DAC will not function without proper analog reference connection!

DAC Specifications

  • Resolution: 12-bit (4096 levels: 0x000 to 0xFFF)
  • Output Range: 0V to Vref (typically 3.3V when properly configured)
  • Output Pin: J2.9 (DAC0 output)
  • Reference Input: Platform-specific analog reference pin
  • Update Rate: Software controlled (Mode 1) or hardware triggered (Mode 2)

Application Functionality

Mode 1: Manual DAC Output Control

Operation:**

  • Writes directly to DAC data register
  • Steps output from 0V to 3.3V in 0x10 increments
  • Continuous ramping until user presses any key

  • Software-controlled timing

    Features:**

  • Direct register manipulation
  • Real-time control
  • Interactive operation
  • Immediate response

Mode 2: Hardware-Triggered Waveform Generation

Operation:**

  • Uses DMA Timer 0 as trigger source at 100 kHz
  • Automatic waveform generation with hardware timing
  • Steps from minimum to maximum values

  • Hardware-synchronized operation

    Features:**

  • Precise timing via DMA timer
  • Automatic waveform stepping
  • Hardware synchronization
  • Reduced CPU loading

Technical Implementation

DAC Configuration Registers

Control Register (DAC_CR):**

  • DAC_CR_PDN: Power down control (0=on, 1=off)
  • DAC_CR_UP: Count up direction
  • DAC_CR_DOWN: Count down direction
  • DAC_CR_AUTO: Automatic waveform mode

  • DAC_CR_SYNC: External synchronization enable

    Waveform Parameters:**

  • step: Increment/decrement value (0x0100)
  • max: Maximum output value (0x0FFF)
  • min: Minimum output value (0x0000)

Hardware Configuration

// Enable DAC0 output drive
sim1.ccm.misccr2 |= MISCCR2_DAC0SEL;
// Disable conflicting ADC3 function
sim1.ccm.misccr2 &= ~(MISCCR2_ADC3EN);
// Route ADC3 input to DAC0 output for monitoring
sim2.adc.cal = ADC_CAL_DAC0;
// Power on DAC
sim2.dac[0].cr &= ~DAC_CR_PDN;

DMA Timer Setup

float frequency = 100000; // 100 kHz
float toggleTime = (1.0 / frequency) * 0.5;
float cpuClockPeriod = (1.0 / (CPU_CLOCK / 2));
uint32_t refTimerCount = (uint32_t)(toggleTime / cpuClockPeriod);
sim2.timer[0].tmr = 0x002A; // Toggle output, reset after reference
sim2.timer[0].trr = refTimerCount;
sim2.timer[0].tmr |= 0x0001; // Start timer

User Interface

Menu System

1. Simple DAC output writing to DAC data register
2. DAC waveform generation using DMA Timer 0

Operation Flow

  1. Select operating mode (1 or 2)
  2. Monitor DAC output on J2.9 with oscilloscope/voltmeter
  3. Press any key to stop current operation
  4. Return to menu for mode selection

Expected Outputs

Mode 1 - Manual Control:**

  • Sawtooth waveform ramping from 0V to 3.3V
  • Step size: ~0.2V increments (0x10 out of 0xFFF)

  • Software-limited update rate

    Mode 2 - Timer Triggered:**

  • Precise sawtooth waveform at 100 kHz trigger rate
  • Hardware-synchronized stepping
  • Timer output visible on designated pin

Hardware Connections and Testing

Basic Setup

  1. Power connections: Ensure proper 3.3V and ground
  2. Reference voltage: Connect analog reference as specified above
  3. DAC output: Monitor J2.9 with oscilloscope or voltmeter
  4. Timer output (Mode 2): Monitor timer pin for trigger signal

Test Procedures

Voltage Verification:**

  • Mode 1: Should see ramping voltage 0V to 3.3V repeatedly
  • Mode 2: Should see stepped waveform with precise timing

  • Check reference voltage is stable 3.3V

    Waveform Analysis:**

  • Mode 1: Irregular timing due to software delays
  • Mode 2: Precise 100 kHz trigger timing
  • Both modes: 12-bit resolution stepping

Load Testing

// Optional: Add load resistor for current testing
// 1k resistor from J2.9 to ground
// Measure voltage across resistor for current calculation

Troubleshooting

Common Issues

  1. No DAC output
    • Check analog reference voltage connection
    • Verify DAC power-on (PDN bit = 0)
    • Confirm J2.9 pin configuration
    • Measure reference voltage at analog input pin
  2. Incorrect output voltage range
    • Verify reference voltage is exactly 3.3V
    • Check for voltage divider loading
    • Confirm DAC data register values (0x000-0xFFF)
  3. Mode 2 not working
    • Verify DMA timer configuration and frequency
    • Check timer output pin assignment
    • Confirm DAC sync configuration
    • Monitor timer output signal
  4. Noisy output
    • Add bypass capacitors near DAC output
    • Check power supply stability
    • Verify proper grounding
    • Use appropriate load impedance

Debug Techniques

Register Monitoring:**

// Display current DAC value
iprintf("DAC Value: 0x%04X\r\n", sim2.dac[0].data);
// Check DAC control register
iprintf("DAC CR: 0x%04X\r\n", sim2.dac[0].cr);

Timer Verification:**

// Monitor timer operation
iprintf("Timer TMR: 0x%04X\r\n", sim2.timer[0].tmr);
iprintf("Timer TCN: 0x%04X\r\n", sim2.timer[0].tcn);

Advanced Features

Custom Waveform Generation

// Triangle wave example
if(sim2.dac[0].cr & DAC_CR_UP) {
if(sim2.dac[0].data >= 0x0FFF) {
sim2.dac[0].cr &= ~DAC_CR_UP;
sim2.dac[0].cr |= DAC_CR_DOWN;
}
} else {
if(sim2.dac[0].data <= 0x0000) {
sim2.dac[0].cr &= ~DAC_CR_DOWN;
sim2.dac[0].cr |= DAC_CR_UP;
}
}

Arbitrary Waveform Playback

// Sine wave lookup table
const uint16_t sineWave[256] = { /* 12-bit sine values */ };
static uint8_t index = 0;
sim2.dac[0].data = sineWave[index++];
if(index >= 256) index = 0;

Multiple Channel Support

// DAC1 configuration (if available)
sim1.ccm.misccr2 |= MISCCR2_DAC1SEL;
sim2.dac[1].cr &= ~DAC_CR_PDN;
sim2.dac[1].data = value1;

Performance Characteristics

Timing Specifications

  • Settling Time: Typically <1 microsecond to 0.1% accuracy
  • **Update Rate**: Limited by CPU (Mode 1) or timer frequency (Mode 2)
  • **Resolution**: 12-bit (0.8mV steps with 3.3V reference)
  • **Linearity**: Dependent on reference voltage stability

CPU Loading

  • **Mode 1**: High CPU usage for continuous updates
  • **Mode 2**: Low CPU usage with hardware triggering
  • **Interrupt Overhead**: Minimal with DMA timer

Application Extensions

Signal Generation

  • Function generators (sine, square, triangle)
  • Audio signal synthesis
  • Test pattern generation
  • Calibration reference signals

Control Systems

  • Analog control loops
  • Servo motor control
  • Variable reference generation
  • Offset/bias voltage generation

Communication

  • FSK modulation
  • Analog data transmission
  • Level shifting
  • Interface voltage generation

Integration Examples

// Web-controlled DAC output
void SetDACFromWeb(uint16_t value) {
if(value <= 0x0FFF) {
sim2.dac[0].data = value;
}
}
// ADC feedback control
void ADCControlledDAC() {
uint16_t adcValue = GetADResult(0);
uint16_t dacValue = ProcessControlLoop(adcValue);
sim2.dac[0].data = dacValue;
}

Related Examples

  • ADC Examples: Analog input measurement and feedback control
  • PWM Examples: Alternative analog output methods
  • Timer Examples: Precise timing and triggering
  • Waveform Generation: Advanced signal synthesis techniques