cortex-m7/cpu/SAME70/include/cpu_pins.h

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#ifndef __CPU_PINS_H
#define __CPU_PINS_H
/*NB_REVISION*/
 
/*NB_COPYRIGHT*/
 
#include <sim.h>
#include <basictypes.h>
 
 
class PinIO {
public:
 volatile Pio &pio;
 uint32_t mask;
 
 typedef enum {
 PIN_FN_IN = 0, 
 PIN_FN_OUT, 
 PIN_FN_A, 
 PIN_FN_B, 
 PIN_FN_C, 
 PIN_FN_D 
 } pin_fn_t;
 
 PinIO() : pio(*((volatile Pio*)PIOA)), mask(0) {}
 constexpr PinIO(uint32_t port, uint32_t pin) : pio(*((volatile Pio*)PIOA+port)), mask(1 << pin) {}
 constexpr PinIO(const PinIO &rhs): pio(rhs.pio), mask(rhs.mask) {}
 
 void setFn(pin_fn_t fn) const {
 if (fn > PIN_FN_OUT) {
 uint8_t bits = ((uint8_t)fn)-2;
 if (bits & 0x1) { pio.PIO_ABCDSR[0] |= mask; }
 else { pio.PIO_ABCDSR[0] &= ~mask; }
 if (bits & 0x2) { pio.PIO_ABCDSR[1] |= mask; }
 else { pio.PIO_ABCDSR[1] &= ~mask; }
 
 pio.PIO_PDR = mask;
 }
 else {
 if (fn) { pio.PIO_OER = mask; }
 else { pio.PIO_ODR = mask; }
 pio.PIO_PER = mask;
 }
 }
 
 int8_t getFn()
 {
 // TODO: check if PIO_LOCKSR is set. if it's set, a peripheral has locked the I/O line
 // The only way to unlock it is to apply a hardware reset to the PIO controller
 if(mask == 0) { return -1; } // pin is not valid
 
 if(pio.PIO_PSR & mask) // if PIO_PSR bit is set, PIO is active on corresponding I/O line (peripheral is inactive)
 {
 // Determine if I/O line is configured for an input or output
 // Read output status register (PIO_OSR). If 0, I/O is an input. If 1, I/O is an output
 return ((pio.PIO_OSR & mask) ? PIN_FN_OUT : PIN_FN_IN);
 }
 else // if PIO_PSR bit is clear, PIO is inactive on corresponding I/O line (peripheral is active)
 {
 // Determine which peripheral function is set
 uint32_t abcdsr0 = (pio.PIO_ABCDSR[0] & mask);
 uint32_t abcdsr1 = (pio.PIO_ABCDSR[1] & mask);
 
 if (abcdsr0 & mask)
 {
 if (abcdsr1 & mask) { return PIN_FN_D; }
 else { return PIN_FN_B; }
 }
 else
 {
 if (abcdsr1 & mask) { return PIN_FN_C; }
 else { return PIN_FN_A; }
 }
 }
 }
 
 void function(pin_fn_t fn) const { setFn(fn); }
 void hiz() const { setFn(PIN_FN_IN); }
 void drive() const { setFn(PIN_FN_OUT); }
 inline void set() const { pio.PIO_SODR = mask; }
 inline void clr() const { pio.PIO_CODR = mask; }
 inline bool tgl() const {bool val = pio.PIO_ODSR & mask;(&(pio.PIO_SODR))[val] = mask;return val;}
 inline bool toggle() const { return tgl(); }
 inline bool readBack() const { return (pio.PIO_PDSR & mask); }
 inline bool read() const { hiz(); return readBack(); }
 inline bool operator=( bool val ) { (&(pio.PIO_SODR))[!val] = mask; return val;}
 inline PinIO& operator=(const PinIO& rhs)
 {
 bool val = rhs;
 (&(pio.PIO_SODR))[!val] = mask; return *this;
 }
 
 inline operator bool() const { return (pio.PIO_PDSR & mask); }
 
 inline bool operator!() const { return ((pio.PIO_ODR & mask) == 0); }
 
 void multidrv(bool enable) const { (&(pio.PIO_MDER))[!enable] = mask; }
 
 void setHighStrength( bool bHighDrive )
 {
 if (bHighDrive) { pio.PIO_DRIVER |= mask; }
 else { pio.PIO_DRIVER &= ~mask;}
 }
 
 void PullUp(bool enable) const {if (enable) {pio.PIO_PUER =mask;} else {pio.PIO_PUDR =mask;}};
 void PullDown(bool enable) const {if (enable) {pio.PIO_PPDER =mask;} else {pio.PIO_PPDDR =mask;}};
 
 uint16_t analogRead() const;
 
 //friend class PinIOArray2;
 
};
 
 
class _PinVector {
protected:
 struct pinCfg {
 uint8_t port : 3;
 uint8_t num : 5;
 };
 const uint8_t len;
 union {
 pinCfg _pins[4];
 pinCfg *const pinArr;
 };
 // _PinVector constructors are protected to prevent the construction of the
 // base class, as the base class has no allocated storage for the pin
 // confuguration settings.
 _PinVector(uint8_t _len, pinCfg *arr);
 _PinVector(uint8_t len, pinCfg *arr,
 PinIO *initpins, uint32_t pinCount);
public:
 uint32_t operator=(uint32_t val);
 PinIO operator[](int idx);
 
 void config(uint32_t idx, PinIO cfg);
 void config(PinIO *pinCfgs, uint32_t count);
 
 operator uint32_t() const;
};
 
 
template<uint8_t n> class PinVector : public _PinVector {
 _PinVector::pinCfg pinStore[n];
public:
 inline PinVector(): _PinVector(n, pinStore) {}
 
 inline PinVector(PinIO *initpins, uint32_t pinCount)
 : _PinVector(n, pinStore, initpins, pinCount)
 { }
 inline uint32_t operator=(uint32_t val) {return (*(_PinVector*)this) = val; }
 inline uint32_t operator=(int val) {return (*(_PinVector*)this) = (uint32_t)val; }
};
 
// TinyPinVectors are a template specialization made for vector lengths where
// the entire configuration list can fit within the memory space of the
// storage pointer, thereby reducing the storage requirements to an absolute
// minimum, while preventing the duplication of code.
#define TinyPinVector(n) \
template<> class PinVector<n> : public _PinVector { \
public: \
 inline PinVector(): _PinVector((n), nullptr) {} \
 \
 inline PinVector(PinIO *initpins, uint32_t pinCount) \
 : _PinVector((n), nullptr, initpins, pinCount) \
 { } \
 inline uint32_t operator=(uint32_t val) {return (*(_PinVector*)this) = val; } \
 inline uint32_t operator=(int val) {return (*(_PinVector*)this) = (uint32_t)val; } \
};
 
TinyPinVector(1);
TinyPinVector(2);
TinyPinVector(3);
TinyPinVector(4);
 
 
 
 
 // end of groupGPIO
#endif /* ----- #ifndef __CPU_PINS_H ----- */