bsp.h File Reference

Hardware functions that are unique to a specific platform. More...

#include <cpu_pins.h>
#include <stdio.h>
#include <component/pmc.h>

Go to the source code of this file.

Classes
class	UniqueIdentifier
	Get the 128-bit Unique Identifier. More...

Functions
void	EnableExtBusBuff (bool enable)
	Enable External Bus Interface Buffers.
uint32_t	SetPLL (uint8_t multiplier)
	Sets PLL to adjust system clock speed, primarily used for power reduction.
uint32_t	SetMCKDivider (uint8_t divider)
	Sets Master Clock prescaler (PRES) in the MCKR register to adjust system clock speed. Primarily used for power reduction.
void	DrivePCK (uint8_t prescaler=1, uint8_t clkSource=PMC_PCK_CSS_MCK)
	Enables external CPU clock signal on J1[31].
void	DisablePCK ()
	Disables external CPU clock signal on J1[31].

Detailed Description

Hardware functions that are unique to a specific platform.

Function Documentation

DrivePCK()

void DrivePCK	(	uint8_t	prescaler = 1,
		uint8_t	clkSource = PMC_PCK_CSS_MCK )

Enables external CPU clock signal on J1[31].

Parameters

prescaler	The prescaler to apply to the clock source PCK generation
clkSource	The clock source used to generate the PCK clock. See pmc.h for options

EnableExtBusBuff()

void EnableExtBusBuff

(

bool

enable

)

Enable External Bus Interface Buffers.

When enabled the following singnals will always be driven as outputs on the P1 header: A0/NSB0, A2, A3, A4, A5, A6, A7, A8, A9, A10, A11, A13, A14, A16/BA0, NSB1 The data buffer is driven when the TIP signal is active, which is also dependant on this function to be enabled. When enabled the following singnals will be driven in the direction controlled by the NRD EBI signal: D0-D15

When disabled, all buffered signals on the P1 header will be HiZ. This will reduce EMI, power consumption and allow for NRD to be used as a GPIO

Parameters

enable

true to enable external bus buffers

SetMCKDivider()

uint32_t SetMCKDivider

(

uint8_t

divider

)

Sets Master Clock prescaler (PRES) in the MCKR register to adjust system clock speed. Primarily used for power reduction.

Please refer to the ATSAME70 processor reference manual Clock Generator chapter for complete limitations of setting the PLL to avoid potentially damaging the processor

The calculation used to determine CPU speed is: CPU_CLOCK = ( OSC_CLOCK * PLL multiplier ) / divider (PRES) The default SBE70LC module has a default PLL speed ( OSC_CLOCK * PLL multiplier ) of 300MHz

• Configurations handled by this function
  1. Adjusts prescaler for Master Clk in the MCKR register
  2. If new CPU Clock is 150MHz or LOWER then the Peripheral to CPU Clock ratio is set to 1:1
  3. Sets new CPU_CLOCK and PERIPH_CLOCK variables
     These are used in many baud rate calculations in NetBurner API, for example serial ports
  4. Reinitializes the system tick so TimeTicks are accurate
  5. Adjusts Flash memory timings
  6. Adjust SDRAM refresh timings
  7. Closes and reopens default serial port to adjust baud

Parameters

divider

Divider for CPU_CLOCK calculation. Sets PRES variable in MCKR register. Only 1,2,3,4,8,16,32,64 are valid, other values have no affect.

Returns

The current CPU clock frequency

SetPLL()

uint32_t SetPLL

(

uint8_t

multiplier

)

Sets PLL to adjust system clock speed, primarily used for power reduction.

Please refer to the ATSAME70 processor reference manual Clock Generator chapter for complete limitations of setting the PLL to avoid potentially damaging the processor

The calculation used to determine CPU speed is: CPU_CLOCK = OSC_CLOCK * mult The default SBE70LCV module has a 12000000hz OSC_CLOCK The function will do nothing if new frequency is >300MHz or <160Mhz due to electrical specifications The only exception to this rule is setting the PLL multiplier to 1 or 0 which will disable it

• Configurations handled by this function
  1. Adjusts PLL configurations for Main Clk
  2. Sets CPU_CLOCK and PERIPH_CLOCK variables
     These are used in many baud rate calculations in NetBurner API, for example serial ports
  3. Reinitializes the system tick so TimeTicks are accurate
  4. Adjusts Flash memory timings
  5. Adjust SDRAM refresh timings
  6. Closes and reopens default serial port to adjust baud

Parameters

multiplier

Multiplier for CPU_CLOCK calculation. Only 0,1,14-25 are valid. Set to 1 or 0 to disable PLL

Returns

The current CPU clock frequency